- Jul 15, 2011
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Olof Johansson authored
Allocate one bit in the available extra cell to indicate if the gpio should be considered logically inverted. Signed-off-by:
Olof Johansson <olof@lixom.net> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jul 14, 2011
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Shawn Guo authored
It adds device tree probe support for spi-imx driver. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jul 10, 2011
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David Jander authored
This patch enables fetching configuration data, which is normally provided via platform_data, from the device-tree instead. If the device is configured from device-tree data, the platform_data struct is not used, and button data needs to be allocated dynamically. Big part of this patch deals with confining pdata usage to the probe function, to make this possible. Signed-off-by:
David Jander <david@protonic.nl> Signed-off-by:
Dmitry Torokhov <dtor@mail.ru>
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- Jul 09, 2011
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Grant Likely authored
Acked-by:
Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jul 08, 2011
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Binghua Duan authored
SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by:
Binghua Duan <Binghua.Duan@csr.com> Signed-off-by:
Rongjun Ying <Rongjun.Ying@csr.com> Signed-off-by:
Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by:
Yuping Luo <Yuping.Luo@csr.com> Signed-off-by:
Bin Shi <Bin.Shi@csr.com> Signed-off-by:
Huayi Li <Huayi.Li@csr.com> Signed-off-by:
Barry Song <Baohua.Song@csr.com> Reviewed-by:
Arnd Bergmann <arnd@arndb.de>
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Shawn Guo authored
The patch adds device tree probe support for gpio-mxc driver. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jul 07, 2011
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Kim Phillips authored
Since technically it's not powerpc arch-specific. Also rename it sec2 to differentiate it from its incompatible successor, the SEC 4. Signed-off-by:
Kim Phillips <kim.phillips@freescale.com> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jul 06, 2011
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Daniel Drake authored
Add a driver to configure the XO-1 RTC via CS5536 MSRs, to be used as a system wakeup source via olpc-xo1-pm. Device detection is based on finding the relevant device tree node. Signed-off-by:
Daniel Drake <dsd@laptop.org> Link: http://lkml.kernel.org/r/1309019658-1712-11-git-send-email-dsd@laptop.org Acked-by:
Andres Salomon <dilinger@queued.net> Acked-by:
Grant Likely <grant.likely@secretlab.ca> Reviewed-by:
Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by:
H. Peter Anvin <hpa@linux.intel.com>
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- Jul 05, 2011
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Stephen Warren authored
Engineering names are more stable than marketing names. Hence, use them for Device Tree compatible properties instead. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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Stephen Warren authored
Engineering names are more stable than marketing names. Hence, use them for Device Tree compatible properties instead. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jun 30, 2011
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Jamie Iles authored
Some platforms e.g. TI Davinci require 32-bit accesses to the UARTs. The of_serial driver currently registers all UARTs as UPIO_MEM. Add a new attribute "reg-io-width" to allow the port to be registered with different IO width requirements. Acked-by:
Alan Cox <alan@linux.intel.com> Signed-off-by:
Jamie Iles <jamie@jamieiles.com> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jun 29, 2011
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Mark Rutland authored
This is based on an earlier patch from Rob Herring <rob.herring@calxeda.com> > Add OF match table to enable OF style driver binding. The dts entry is like > this: > > pmu { > compatible = "arm,cortex-a9-pmu"; > interrupts = <100 101>; > }; > > The use of pdev->id as an index breaks with OF device binding, so set the type > based on the OF compatible string. This modification sets the PMU hardware type based on data embedded in the binding, allowing easy addition of new PMU types in future. Support for new PMU types not provided by devicetree can be added later using platform_device_id tables in a similar fashion. Signed-off-by:
Mark Rutland <mark.rutland@arm.com> Acked-by:
Jamie Iles <jamie@jamieiles.com> Acked-by:
Rob Herring <rob.herring@calxeda.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- Jun 28, 2011
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Grant Likely authored
Allow for multiple named gpio properties Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jun 27, 2011
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Jamie Iles authored
The of_serial bindings can be used to register a number of serial devices. Document this binding with all of the others. v3: remove device-type and clarify used-by-rtas Signed-off-by:
Jamie Iles <jamie@jamieiles.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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Mike Frysinger authored
Signed-off-by:
Mike Frysinger <vapier@gentoo.org> Signed-off-by:
Jiri Kosina <jkosina@suse.cz>
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- Jun 21, 2011
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Grant Likely authored
Add a function to create amba_devices (i.e. primecell peripherals) from device tree nodes. The device tree scanning is done by the of_platform_populate() function which can call of_amba_device_create based on a match table entry. Nodes with a "arm,primecell-periphid" property can override the h/w peripheral id value. Based on the original work by Jeremy Kerr. Signed-off-by:
Jeremy Kerr <jeremy.kerr@canonical.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Rob Herring <rob.herring@calxeda.com> Reviewed-by:
Arnd Bergmann <arnd@arndb.de> [grant.likely: add Jeremy's original s-o-b line, changes from review comments, and moved all code to drivers/of/platform.c] Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- Jun 20, 2011
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John Linn authored
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by:
John Linn <john.linn@xilinx.com>
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- Jun 15, 2011
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Grant Likely authored
Add support for decoding gpios from the device tree Signed-off-by:
Grant Likely <grant.likely@secretlab.ca> Acked-by:
Olof Johansson <olof@lixom.net>
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Grant Likely authored
As part of the gpio driver consolidation, this patch moves the Tegra driver into drivers/gpio Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- May 23, 2011
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Richard Cochran authored
The eTSEC includes a PTP clock with quite a few features. This patch adds support for the basic clock adjustment functions, plus two external time stamps, one alarm, and the PPS callback. Signed-off-by:
Richard Cochran <richard.cochran@omicron.at> Acked-by:
David S. Miller <davem@davemloft.net> Acked-by:
John Stultz <john.stultz@linaro.org> Signed-off-by:
John Stultz <john.stultz@linaro.org>
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Grant Likely authored
v6: typo fixes v5: clarified that dtb should be aligned on a 64 bit boundary in RAM. v3: added details to Documentation/arm/Booting Acked-by:
Tony Lindgren <tony@atomide.com> Acked-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by:
Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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- May 19, 2011
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Dipen Dudhat authored
Signed-off-by:
Dipen Dudhat <Dipen.Dudhat@freescale.com> Acked-By:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Bhaskar Upadhaya authored
Signed-off-by:
Bhaskar Upadhaya <bhaskar.upadhaya@freescale.com> Acked-By:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Scott Wood authored
Update the existing example in the general mpic binding to have a separate TCRx region. Currently the example doesn't describe TCRx at all. The one upstream device tree with an mpic timer node (p1022ds) uses one large reg region to describe both, even though there are other unrelated registers in between. That device tree also contains a bogus interrupt specifier, and there's no upstream software that uses this yet, so changing this shouldn't be a problem. Add a full binding for the MPIC timer node, not just an example of 4-cell interrupts in the MPIC binding. Add fsl,available-ranges, similar to msi-available-ranges. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- May 10, 2011
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Justin P. Mattock authored
- kenrel -> kernel - whetehr -> whether - ttt -> tt - sss -> ss Signed-off-by:
Justin P. Mattock <justinmattock@gmail.com> Signed-off-by:
Jiri Kosina <jkosina@suse.cz>
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- Apr 04, 2011
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Sylvestre Ledru authored
Fix some minor typos: * informations => information * there own => their own * these => this Signed-off-by:
Sylvestre Ledru <sylvestre.ledru@scilab.org> Signed-off-by:
Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Mar 31, 2011
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Lucas De Marchi authored
Fixes generated by 'codespell' and manually reviewed. Signed-off-by:
Lucas De Marchi <lucas.demarchi@profusion.mobi>
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- Mar 26, 2011
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Kim Phillips authored
- all the integration parameters have been captured by the binding. - the block name really uniquely identifies this hardware. Some advocate putting SoC names everywhere in case software needs to work around some chip-specific bug, but more precise SoC information already exists in SVR, and board information already exists in the top-level device tree node. Note that sometimes the SoC name is a worse identifier than the block version, as the block version can change between revisions of the same SoC. As a matter of historical reference, neither SEC versions 2.x nor 3.x (driven by talitos) ever needed CHIP references. Signed-off-by:
Kim Phillips <kim.phillips@freescale.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Acked-off-by:
Grant Likely <grant.likely@secretlab.ca> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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Kim Phillips authored
Help clarify that the number trailing in compatible nomenclature is the version number of the device, i.e., change: "fsl,p4080-sec4.0", "fsl,sec4.0"; to: "fsl,p4080-sec-v4.0", "fsl,sec-v4.0"; Signed-off-by:
Kim Phillips <kim.phillips@freescale.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Steve Cornelius <sec@pobox.com> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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Kim Phillips authored
The SEC4 supercedes the SEC2.x/3.x as Freescale's Integrated Security Engine. Its programming model is incompatible with all prior versions of the SEC (talitos). The SEC4 is also known as the Cryptographic Accelerator and Assurance Module (CAAM); this driver is named caam. This initial submission does not include support for Data Path mode operation - AEAD descriptors are submitted via the job ring interface, while the Queue Interface (QI) is enabled for use by others. Only AEAD algorithms are implemented at this time, for use with IPsec. Many thanks to the Freescale STC team for their contributions to this driver. Signed-off-by:
Steve Cornelius <sec@pobox.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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- Mar 22, 2011
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Paul Mundt authored
Now that there is a Documentation/devicetree hierarchy, and the driver in question has no specific platform dependency, move the binding information to a more appropriate place. Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- Mar 21, 2011
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Dirk Eibach authored
Configuration for ads1015 gain and datarate is possible via devicetree or platform data. This is a followup patch to previous ads1015 patches on Jean Delvares tree. Signed-off-by:
Dirk Eibach <eibach@gdsys.de> Signed-off-by:
Jean Delvare <khali@linux-fr.org>
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Dirk Eibach authored
Signed-off-by:
Dirk Eibach <eibach@gdsys.de> Signed-off-by:
Jean Delvare <khali@linux-fr.org>
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- Mar 20, 2011
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Meador Inge authored
This binding documents several properties that have been in use for quite some time, and adds one new property 'pic-no-reset', which controls the runtime initialization behavior of the PIC. More specifically, the presence of 'pic-no-reset' mandates that the PIC shall not be reset during runtime initialization and that any initialization related to interrupt sources shall be limited to sources explicitly referenced in the device tree. This functionality is useful in AMP systems where multiple OSes are sharing the PIC and the reinitialization of the PIC can interfere with OSes that are already up and running. The interrupt specifier definition is based off of Stuart Yoder's FSL MPIC binding. Signed-off-by:
Meador Inge <meador_inge@mentor.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Stuart Yoder <stuart.yoder@freescale.com> Cc: Hollis Blanchard <hollis_blanchard@mentor.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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- Mar 16, 2011
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Rob Landley authored
The device tree infrastructure is being genericized so its documentation moved out of the PowerPC directory. Signed-off-by:
Rob Landley <rlandley@parallels.com> Signed-off-by:
Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Mar 15, 2011
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Vivek Mahajan authored
Adds binding documentation for cache sram for the PQ3 and some QorIQ based platforms. Signed-off-by:
Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Stuart Yoder authored
Define the binding for compatible = "fsl,mpic", including the definition of 4-cell interrupt specifiers. The 3rd and 4th cells are needed to define additional types of interrupt source outside the "normal" external and internal interrupts in FSL SoCs. Define error interrupt, IPIs, and PIC timer sources. Signed-off-by:
Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Scott Wood authored
Now handles multiple ranges, doesn't make assumptions about interrupt specifier format, and doesn't claim interrupts that don't correspond to an available range. Also has some better error checking. The device tree binding is updated to clarify some existing assumptions. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Mar 01, 2011
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Tobias Klauser authored
Advertise the possibility to use this driver with device tree if CONFIG_OF is set. Signed-off-by:
Tobias Klauser <tklauser@distanz.ch> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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Tobias Klauser authored
With the recent switch of the (currently still out-of-tree) Nios2 Linux port to devicetree we want to be able to retrieve the resources and properties from dts. The old method to retrieve resources and properties from platform data is still supported. Signed-off-by:
Tobias Klauser <tklauser@distanz.ch> Acked-by:
Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by:
Grant Likely <grant.likely@secretlab.ca>
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