-
Peter Maydell authored
M profile ARM cores don't have a CPSR mode field. Set the bit in the TB flags that indicates non-user mode correctly for these cores. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
05ed9a99