Encoding common styles of grammar productions
Consider this fragment of the Verilog grammar from the Verismith paper, where [] means "zero or one":
declaration ::= [ direction ] [ net ] [ signed ] identifier [ = const_expr ]
;
direction ::=
input
|output
|inout
net ::=
reg
|wire
signed ::=
unsigned
|signed
How does one best encode this in Xsmith?
The approach I implemented uses the following pattern over and over, which I am not very happy with, because it feels verbose. I could reduce the verbosity with some macros, I'm sure—but if that is the answer, the Xsmith should provide those macros for all fuzzer implementers to use.
(add-to-grammar
verilog-core
...
[MaybeDirection #f () #:prop may-be-generated #f]
[JustDirection MaybeDirection ([dir : Direction])]
[NothingDirection MaybeDirection ()]
...
[Direction #f () #:prop may-be-generated #f]
[InputDirection Direction ()]
[OutputDirection Direction ()]
[InOutDirection Direction ()]
)
(add-prop
verilog-core
render-node-info
...
[JustDirection (λ (n) (render-node (ast-child 'dir n)))]
[NothingDirection (λ (n) empty)]
...
[InputDirection (λ (n) kw-input)]
[OutputDirection (λ (n) kw-output)]
[InOutDirection (λ (n) kw-inout)]
)