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  • Aurelien Jarno's avatar
    SH4: Implement FD bit · d8299bcc
    Aurelien Jarno authored
    SH4 manual say that if a floating point instruction is executed while
    FD bit in the status register is 1, an exception should be raised. QEMU
    presently does not do that, so the kernel does not initialize FP state
    for any thread, nor does it save/restore FP state. The most apparent
    consequence is that while recent gcc/libc expect double-precision mode
    to be set by kernel, they run in single-precision mode, and all FP code
    produces wrong values.
    
    This patch fixes this. It also fixes a couple of places where PC was
    not updated before handling an exception, although both those places
    deal with invalid instruction and don't lead to any user-visible bugs.
    
    (Vladimir Prus)
    
    git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5937 c046a42c-6fe2-441c-8c8c-71466251a162
    d8299bcc