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  • Eduardo Habkost's avatar
    add Westmere as a qemu cpu model (v2) · c58a6694
    Eduardo Habkost authored
    Version 1 of this patch was:
    
    Message-Id: <1307041990-26194-11-git-send-email-ehabkost@redhat.com
    http://marc.info/?l=qemu-devel&m=130704415919346
    
    
    
    This version doesn't have the duplicate feature bits on extfeature_edx, though,
    as they are being removed from the Intel models (as they are reserved bits on
    Intel CPUs).
    
    Version 1 patch description:
    
        This patch adds Westmere as a qemu cpu model.  The only
        additional guest visible feature of a Westmere relative
        to Nehalem is the inclusion of AES instructions.  However
        as other non-ABI visible modifications exist along with
        fabrication changes, the CPUID data of the corresponding
        deployed silicon was altered slightly to reflect this.
    
        We've seen isolated cases where apparently unrelated yet
        slightly incoherent CPUID data has caused problems, most
        notably during guest boot.  Providing Westmere as a
        model separate fro Nehalem allows us to more easily address
        such quirks.
    
        [ehabkost: edited commit message to have a better Subject line]
    
    Signed-off-by: default avatarjohn cooper <john.cooper@redhat.com>
    Signed-off-by: default avatarEduardo Habkost <ehabkost@redhat.com>
    
    Changes version 1 -> version 2:
     - Remove the duplicate feature bits on extfeature_edx, that are
       reserved on Intel CPUs
     - Reorder feature flags
     - Remove x2apic from the definition because x2apic requires some fixes
       that have to be resubmitted
    
    Signed-off-by: default avatarEduardo Habkost <ehabkost@redhat.com>
    Signed-off-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
    c58a6694