• Thierry Reding's avatar
    drm/tegra: dsi: Enhance runtime power management · 87904c3e
    Thierry Reding authored
    The MIPI DSI output on Tegra SoCs requires some external logic to
    calibrate the MIPI pads before a video signal can be transmitted. This
    MIPI calibration logic requires to be powered on while the MIPI pads are
    being used, which is currently done as part of the DSI driver's probe
    implementation.
    
    This is suboptimal because it will leave the MIPI calibration logic
    powered up even if the DSI output is never used.
    
    On Tegra114 and earlier this behaviour also causes the driver to hang
    while trying to power up the MIPI calibration logic because the power
    partition that contains the MIPI calibration logic will be powered on
    by the display controller at output pipeline configuration time. Thus
    the power up sequence for the MIPI calibration logic happens before
    it's power partition is guaranteed to be enabled.
    
    Fix this by splitting up the API into a request/free pair of functions
    that manage the runtime dependency between the DSI and the calibration
    modules (no registers are accessed) and a set of enable, calibrate and
    disable functions that program the MIPI calibration logic at points in
    time where the power partition is really enabled.
    
    While at it, make sure that the runtime power management also works in
    ganged mode, which is currently also broken.
    Reported-by: 's avatarJonathan Hunter <jonathanh@nvidia.com>
    Tested-by: 's avatarJonathan Hunter <jonathanh@nvidia.com>
    Signed-off-by: 's avatarThierry Reding <treding@nvidia.com>
    87904c3e
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