In some condition we receive the break interrupt but nothing is putted
in the Rx FIFO and the correspondend bit in the status register is not
set. Thus, no-one clear the interrupt and the handler will be called
This patch clear the break interrupt as soon as it occurs. Then, if the
break character '\0' is putted in the fifo we will manage it.
We can also unmask the Break interrupt but its bit in ISR is still set
on break. So I think is better to keep the registers clean.
Signed-off-by: Federico Vaga <email@example.com>
Acked-by: Samuel Iglesias Gonsalvez <firstname.lastname@example.org>
Signed-off-by: Greg Kroah-Hartman <email@example.com>