- Jun 21, 2009
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Pierre Ossman authored
Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Harald Welte authored
The SDHCI controller found in the VX855ES requires 10ms delay between applying power and applying clock. This issue has been discovered and documented by the OLPC XO1.5 team. Signed-off-by:
Harald Welte <HaraldWelte@viatech.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Ben Dooks authored
This was missed in the DMA changes during the s3c24xx updates in commit 8970ef47. Signed-off-by:
Ben Dooks <ben@simtec.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Harald Welte authored
This adds the via-sdmmc driver for the SD/MMC-controller of VIA, which is found in a number of recent integrated VIA chipset products. Signed-off-by:
Harald Welte <HaraldWelte@viatech.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Anton Vorontsov authored
Some hosts (hardware configurations, or particular SD/MMC slots) may not support 4-bit bus. For example, on MPC8569E-MDS boards we can switch between serial (1-bit only) and nibble (4-bit) modes, thought we have to disable more peripherals to work in 4-bit mode. Along with some small core changes, this patch modifies sdhci-of driver, so that now it looks for "sdhci,1-bit-only" property in the device-tree, and if specified we enable a proper quirk. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by:
Grant Likely <grant.likely@secretlab.ca> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Ben Dooks authored
Add quirk to show the controller cannot do multi-block IO. This is mainly for the Samsung SDHCI controller that currently cannot manage to do multi-block PIO without timing out. Signed-off-by:
Ben Dooks <ben@simtec.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Ben Dooks authored
Update the ADMA error reporting to not only show the overall controller state but also to print the ADMA descriptor list. Signed-off-by:
Ben Dooks <ben@simtec.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Ben Dooks authored
Add support for the 'HSMMC' block(s) in the Samsung SoC line. These are compatible with the SDHCI driver so add the necessary setup and driver binding for the platform devices. Signed-off-by:
Ben Dooks <ben@simtec.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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- Jun 15, 2009
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Ben Dooks authored
This was missed in the DMA changes during the s3c24xx updates in commit 8970ef47. Signed-off-by:
Ben Dooks <ben-linux@fluff.org>
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- Jun 13, 2009
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Nicolas Ferre authored
New revision of Atmel MCI interface adds new features. This is a update of register definition in header file. This new MCI IP is called MCI2. Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by:
Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Nicolas Ferre authored
The MCI IP is shared among AVR32 and AT91 SOCs. AT91 has specific bit definitions in the user interface of MCI SD/MMC IP. Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by:
Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Philipp Zabel authored
Now tmio_mmc is able to drive the MMC/SD cell in ASIC3. Signed-off-by:
Philipp Zabel <philipp.zabel@gmail.com> Acked-by:
Ian Molton <spyro@f2s.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Ben Dooks authored
In the write recovery routine, the data to get from the card is allocated from the stack. The DMA mapping documentation says explicitly stack memory is not mappable by any of the DMA calls. Change to using kmalloc() to allocate the memory for the result from the card and then free it once we've finished with the transaction. [ Changed to GFP_KERNEL allocation - Pierre Ossman ] Signed-off-by:
Ben Dooks <ben@simtec.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Ben Dooks authored
If using ADMA, then we should print the ADMA error and current pointer in sdhci_dumpregs() when any debug is requested. Signed-off-by:
Ben Dooks <ben@simtec.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Ian Molton authored
This patch fixes the clock setup in tmio_mmc. * Incorrect divider setting * Cruft written to the clock registers (seemingly harmless but Not Good (tm)) It also eliminates some unnecessary ifs and tidies the loop syntax. Thanks to Philipp Zabel who discovered the divider issue, commenting "Except for the SDCLK = HCLK (divider bypassed) case, the clock setting resulted in double the requested frequency. The smallest possible frequency (f_max/512) is configured with a divider setting 0x80, not 0x40." Signed-off-by:
Ian Molton <ian@mnementh.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Philipp Zabel authored
ASIC3 can disable the memory, so we need to wait for mfd_cell->enable to enable the memory before we can map the SD control registers. Signed-off-by:
Philipp Zabel <philipp.zabel@gmail.com> Acked-by:
Ian Molton <ian@mnementh.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Philipp Zabel authored
Signed-off-by:
Philipp Zabel <philipp.zabel@gmail.com> Acked-by:
Ian Molton <ian@mnementh.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Philipp Zabel authored
Use an IRQF_TRIGGER_ flag in request_irq instead. Signed-off-by:
Philipp Zabel <philipp.zabel@gmail.com> Acked-by:
Ian Molton <ian@mnementh.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Philipp Zabel authored
Some ASIC3 devices in the wild are connected with the address bus shifted by one line, so that its 16-bit registers appear 32-bit aligned in host memory space. Signed-off-by:
Philipp Zabel <philipp.zabel@gmail.com> Acked-by:
Ian Molton <ian@mnementh.co.uk> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Philipp Zabel authored
The Toshiba parts all have a 24 MHz HCLK, but HTC ASIC3 has a 24.576 MHz HCLK and AMD Imageon w228x's HCLK is 80 MHz. With this patch, the MFD driver provides the HCLK frequency to tmio_mmc via mfd_cell->driver_data. Signed-off-by:
Philipp Zabel <philipp.zabel@gmail.com> Acked-by:
Ian Molton <ian@mnementh.co.uk> Acked-by:
Samuel Ortiz <sameo@openedhand.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Wolfgang Muees authored
This patch changes the reported error code for the responses to a command from EINVAL to EFAULT/ENOSYS, as EINVAL is reserved for non-recoverable host errors, and the responses from the SD/MMC card may be because of recoverable transmission errors in the command or in the response. Response codes in SPI mode are NOT protected by a checksum, so don't trust them. Signed-off-by:
Wolfgang Muees <wolfgang.mues@auerswald.de> Acked-by:
Matt Fleming <matt@console-pimps.org> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Michał Mirosław authored
Signed-off-by:
Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Richard Röjfors authored
Added a platform driver which uses the SDHCI core. Signed-off-by:
Richard Röjfors <richard.rojfors.ext@mocean-labs.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Pierre Ossman authored
The MMC core has now been fixed to not send silly frequencies to the drivers which means we can remove this workaround. Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Pierre Ossman authored
Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Michał Mirosław authored
The code is divided in two parts. There is a virtual 'bus' driver that handles PCI device and registers three new devices one per card reader type. The other driver handles SD/MMC part of the reader. Signed-off-by:
Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Daniel Ribeiro authored
Changes pxamci.c to use the regulator subsystem. Uses the regulator case CONFIG_REGULATOR is defined and a matching is regulator is provided, or falls back to pdata->setpower otherwise. A warning is displayed case both a valid regulator and pdata is set, and the regulator is used. Signed-off-by:
Daniel Ribeiro <drwyrm@gmail.com> Acked-by:
Eric Miao <eric.miao@marvell.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Sascha Hauer authored
Some controllers allow a much lower frequency than 400kHz. Keep the minimum frequency within sensible limits. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de>
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Pierre Ossman authored
Because of granularity issues, sometimes we told the hardware to change to the voltage we were already at. Rework the logic so this doesn't happen. Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Uwe Kleine-König authored
A pointer to mmc_omap_probe which lives in .init.text is passed to the core via platform_driver_register and so the kernel might oops if probe is called after the init code is discarded. As requested by David Brownell platform_driver_probe is used instead of moving the probe function to .devinit.text. This saves some memory, but might have the downside that a device being registered after the call to mmc_omap_init but before the init sections are discarded will not be bound anymore to the driver. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by:
David Brownell <dbrownell@users.sourceforge.net> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Wolfgang Muees authored
Speedup for slow cards by transfering more data at once. This patch also reduces the amount of wear-out of the flash blocks because fewer partial blocks are written. Signed-off-by:
Wolfgang Muees <wolfgang.mues@auerswald.de> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Jorg Schummer authored
With this patch, mmc_rescan can detect the removal of an mmc card and the insertion of (possibly another) card in the same run. This means that a card change can be detected without having to call mmc_detect_change multiple times. This change generalises the core such that it can be easily used by hosts which provide a mechanism to detect only the presence of a card reader cover, which has to be taken off in order to insert a card. Other hosts ("card detect" or "MMC_CAP_NEEDS_POLL") each receive an event when a card is removed and when a card is inserted, so it is sufficient for them if mmc_rescan handles only one event at a time. "Cover detect" hosts, however, only receive events about the cover status. This means that between 2 subsequent events, both a card removal and a card insertion can occur. In this case, the pre-patch version of mmc_rescan would only detect the removal of the previous card but not the insertion of the new card. Signed-off-by:
Jorg Schummer <ext-jorg.2.schummer@nokia.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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- Jun 11, 2009
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Linus Walleij authored
I found the PrimeCell/AMBA Bus drivers distrusting the resource passed in as part of the struct amba_device abstraction. This patch removes all hard coded resource sizes found in the PrimeCell drivers and move the responsibility of this definition back to the platform/board device definition, which already exist and appear to be correct for all in-tree users of these drivers. We do this using the resource_size() inline function which was also replicated in the only driver using the resource size, so that has been changed too. The KMI_SIZE was left in kmi.h in case someone likes it. Test-compiled against Versatile and Integrator defconfigs, seems to work but I don't posess these boards and cannot test them. Signed-off-by:
Linus Walleij <linus.walleij@stericsson.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- Jun 03, 2009
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Dave Liu authored
Freescale eSDHC controller has the special order for the HOST version register. that is not same as the other's registers. The address of HOSTVER in spec is 0xFE, and we need use the in_be16(0xFE) to access it, not in_be16(0xFC). Signed-off-by:
Dave Liu <daveliu@freescale.com> Acked-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Nicolas Pitre authored
Especially with Sandisk SDHC cards, the second SWITCH command was failing with a timeout and the card was not recognized at all. However if the system was busy, or debugging was enabled, or a udelay(100) was inserted before the second SWITCH command in the core code, then the timing was so that the card started to work. With some unusual block sizes, the data FIFO status doesn't indicate a "empty" state right away when the data transfer is done. Queuing another data transfer in that condition results in a transfer timeout. The empty FIFO bit eventually get set by itself in less than 50 usecs when it is not set right away. So let's just poll for that bit before configuring the controller with a new data transfer. Signed-off-by:
Nicolas Pitre <nico@marvell.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Nicolas Pitre authored
Empirical evidences show that this is causing far more problems than it solves when this mode is enabled in the host hardware. Amongst those cards that are known to be non functional when this bit is set are: A-Data "Speedy" 2GB SD card Kodak 512MB SD card Ativa 1GB MicroSD card Marvell 8688 (WIFI/Bluetooth) SDIO card Since those cards do work on other host controllers which do honnor the hs timing, the issue must be with this particular host hardware. Signed-off-by:
Nicolas Pitre <nico@marvell.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Ben Nizette authored
disable_irq() should wait for all running handlers to complete before returning. As such, if it's used to disable an interrupt from that interrupt's handler it will deadlock. This replaces the dangerous instances with the _nosync() variant which doesn't have this problem. Signed-off-by:
Ben Nizette <bn@niasdigital.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Kumar Gala authored
We plan to use fsl,esdhc going forward as the base compatible so update the driver to bind against it. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Nicolas Pitre authored
Signed-off-by:
Nicolas Pitre <nico@marvell.com> Tested-by:
Martin Michlmayr <tbm@cyrius.com> Signed-off-by:
Pierre Ossman <pierre@ossman.eu>
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Martin Fuzzey authored
Signed-off-by:
Martin Fuzzey <mfuzzey@gmail.com>
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