- Jul 12, 2011
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Darren Hart authored
The real-mode kernel header init_size field is located at 0x260 per the field listing in th e"REAL-MODE KERNEL HEADER" section. It is listed as 0x25c in the "DETAILS OF HEADER FIELDS" section, which overlaps with pref_address. Correct the details listing to 0x260. Signed-off-by:
Darren Hart <dvhart@linux.intel.com> Link: http://lkml.kernel.org/r/541cf88e2dfe5b8186d8b96b136d892e769a68c1.1310441260.git.dvhart@linux.intel.com CC: H. Peter Anvin <hpa@zytor.com> Signed-off-by:
H. Peter Anvin <hpa@linux.intel.com>
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- Jun 05, 2011
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Andy Lutomirski authored
Signed-off-by:
Andy Lutomirski <luto@mit.edu> Cc: Jesper Juhl <jj@chaosbits.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Jan Beulich <JBeulich@novell.com> Cc: richard -rw- weinberger <richard.weinberger@gmail.com> Cc: Mikael Pettersson <mikpe@it.uu.se> Cc: Andi Kleen <andi@firstfloor.org> Cc: Brian Gerst <brgerst@gmail.com> Cc: Louis Rilling <Louis.Rilling@kerlabs.com> Cc: Valdis.Kletnieks@vt.edu Cc: pageexec@freemail.hu Link: http://lkml.kernel.org/r/fc134867cc550977cc996866129e11a16ba0f9ea.1307292171.git.luto@mit.edu Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- May 10, 2011
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Joerg Roedel authored
This file only contains code relevant for the northbridge gart in AMD processors. This patch renames the file to represent this fact in the filename. Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com>
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- Mar 22, 2011
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Olaf Hering authored
The oops=panic cmdline option is not x86 specific, move it to generic code. Update documentation. Signed-off-by:
Olaf Hering <olaf@aepfle.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Mar 18, 2011
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Lucas De Marchi authored
Fix 'upto' misspelling and align parameters. Signed-off-by:
Lucas De Marchi <lucas.demarchi@profusion.mobi> Cc: trivial@kernel.org LKML-Reference: <1300389856-1099-2-git-send-email-lucas.demarchi@profusion.mobi> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Jan 13, 2011
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Lasse Collin authored
This integrates the XZ decompression code to the x86 pre-boot code. mkpiggy.c is updated to reserve about 32 KiB more buffer safety margin for kernel decompression. It is done unconditionally for all decompressors to keep the code simpler. The XZ decompressor needs around 30 KiB of heap, so the heap size is increased to 32 KiB on both x86-32 and x86-64. Documentation/x86/boot.txt is updated to list the XZ magic number. With the x86 BCJ filter in XZ, XZ-compressed x86 kernel tends to be a few percent smaller than the equivalent LZMA-compressed kernel. Signed-off-by:
Lasse Collin <lasse.collin@tukaani.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Alain Knaff <alain@knaff.lu> Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> Cc: Phillip Lougher <phillip@lougher.demon.co.uk> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Nov 11, 2010
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Thomas Gleixner authored
Add CE4100 platform support. CE4100 needs early setup like moorestown. Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Dirk Brandewie <dirk.brandewie@gmail.com> LKML-Reference: <94720fd7f5564a12ebf202cf2c4f4c0d619aab35.1289331834.git.dirk.brandewie@gmail.com> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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- Jun 29, 2010
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Christoph Hellwig authored
IRQ stacks provide much better safety against unexpected stack use from interrupts, at the minimal downside of slightly higher memory usage. Enable irq stacks also for the default 8k stack on 32-bit kernels to minimize the problem of stack overflows through interrupt activity. This is what the 64-bit kernel and various other architectures already do. Signed-off-by:
Christoph Hellwig <hch@lst.de> LKML-Reference: <20100628121554.GA6605@lst.de> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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- Jun 18, 2010
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Andres Salomon authored
Add support for saving OFW's cif, and later calling into it to run OFW commands. OFW remains resident in memory, living within virtual range 0xff800000 - 0xffc00000. A single page directory entry points to the pgdir that OFW actually uses, so rather than saving the entire page table, we grab and install that one entry permanently in the kernel's page table. This is currently only used by the OLPC XO. Note that this particular calling convention breaks PAE and PAT, and so cannot be used on newer x86 hardware. Signed-off-by:
Andres Salomon <dilinger@queued.net> LKML-Reference: <20100618174653.7755a39a@dev.queued.net> Signed-off-by:
H. Peter Anvin <hpa@linux.intel.com>
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- Feb 15, 2010
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David Rientjes authored
Now that numa=fake=<size>[MG] is implemented, it is possible to remove configurable node size support. The command-line parsing was already broken (numa=fake=*128, for example, would not work) and since fake nodes are now interleaved over physical nodes, this support is no longer required. Signed-off-by:
David Rientjes <rientjes@google.com> LKML-Reference: <alpine.DEB.2.00.1002151343080.26927@chino.kir.corp.google.com> Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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David Rientjes authored
numa=fake=N specifies the number of fake nodes, N, to partition the system into and then allocates them by interleaving over physical nodes. This requires knowledge of the system capacity when attempting to allocate nodes of a certain size: either very large nodes to benchmark scalability of code that operates on individual nodes, or very small nodes to find bugs in the VM. This patch introduces numa=fake=<size>[MG] so it is possible to specify the size of each node to allocate. When used, nodes of the size specified will be allocated and interleaved over the set of physical nodes. FAKE_NODE_MIN_SIZE was also moved to the more-appropriate include/asm/numa_64.h. Signed-off-by:
David Rientjes <rientjes@google.com> LKML-Reference: <alpine.DEB.2.00.1002151342510.26927@chino.kir.corp.google.com> Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- Sep 23, 2009
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Jason Wessel authored
Add missing information about requirements of using the EHCI usb debug controller as well as to mention you can use a debug controller other than the first one in the system. Signed-off-by:
Jason Wessel <jason.wessel@windriver.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Sarah Sharp <sarah.a.sharp@intel.com> Cc: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@suse.de>
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- Aug 31, 2009
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Pan, Jacob jun authored
x86 bootprotocol 2.07 has introduced hardware_subarch ID in the boot parameters provided by FW. We use it to identify Moorestown platforms. [ tglx: Cleanup and paravirt fix ] Signed-off-by:
Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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- Jul 21, 2009
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Joseph Cihula authored
This patch adds kernel configuration and boot support for Intel Trusted Execution Technology (Intel TXT). Intel's technology for safer computing, Intel Trusted Execution Technology (Intel TXT), defines platform-level enhancements that provide the building blocks for creating trusted platforms. Intel TXT was formerly known by the code name LaGrande Technology (LT). Intel TXT in Brief: o Provides dynamic root of trust for measurement (DRTM) o Data protection in case of improper shutdown o Measurement and verification of launched environment Intel TXT is part of the vPro(TM) brand and is also available some non-vPro systems. It is currently available on desktop systems based on the Q35, X38, Q45, and Q43 Express chipsets (e.g. Dell Optiplex 755, HP dc7800, etc.) and mobile systems based on the GM45, PM45, and GS45 Express chipsets. For more information, see http://www.intel.com/technology/security/ . This site also has a link to the Intel TXT MLE Developers Manual, which has been updated for the new released platforms. A much more complete description of how these patches support TXT, how to configure a system for it, etc. is in the Documentation/intel_txt.txt file in this patch. This patch provides the TXT support routines for complete functionality, documentation for TXT support and for the changes to the boot_params structure, and boot detection of a TXT launch. Attempts to shutdown (reboot, Sx) the system will result in platform resets; subsequent patches will support these shutdown modes properly. Documentation/intel_txt.txt | 210 +++++++++++++++++++++ Documentation/x86/zero-page.txt | 1 arch/x86/include/asm/bootparam.h | 3 arch/x86/include/asm/fixmap.h | 3 arch/x86/include/asm/tboot.h | 197 ++++++++++++++++++++ arch/x86/kernel/Makefile | 1 arch/x86/kernel/setup.c | 4 arch/x86/kernel/tboot.c | 379 +++++++++++++++++++++++++++++++++++++++ security/Kconfig | 30 +++ 9 files changed, 827 insertions(+), 1 deletion(-) Signed-off-by:
Joseph Cihula <joseph.cihula@intel.com> Signed-off-by:
Shane Wang <shane.wang@intel.com> Signed-off-by:
Gang Wei <gang.wei@intel.com> Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- Jul 10, 2009
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Amerigo Wang authored
exception.txt only explains the code on x86, so it's better to move it into Documentation/x86 directory. And also rename it to exception-tables.txt which looks much more reasonable. This patch is on top of the previous one. Signed-off-by:
WANG Cong <amwang@redhat.com> Signed-off-by:
Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jun 11, 2009
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Hidetoshi Seto authored
This patch introduces three boot options (no_cmci, dont_log_ce and ignore_ce) to control handling for corrected errors. The "mce=no_cmci" boot option disables the CMCI feature. Since CMCI is a new feature so having boot controls to disable it will be a help if the hardware is misbehaving. The "mce=dont_log_ce" boot option disables logging for corrected errors. All reported corrected errors will be cleared silently. This option will be useful if you never care about corrected errors. The "mce=ignore_ce" boot option disables features for corrected errors, i.e. polling timer and cmci. All corrected events are not cleared and kept in bank MSRs. Usually this disablement is not recommended, however it will be a help if there are some conflict with the BIOS or hardware monitoring applications etc., that clears corrected events in banks instead of OS. [ And trivial cleanup (space -> tab) for doc is included. ] Signed-off-by:
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by:
Andi Kleen <ak@linux.intel.com> LKML-Reference: <4A30ACDF.5030408@jp.fujitsu.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Jun 03, 2009
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Andi Kleen authored
On Intel platforms machine check exceptions are always broadcast to all CPUs. This patch makes the machine check handler synchronize all these machine checks, elect a Monarch to handle the event and collect the worst event from all CPUs and then process it first. This has some advantages: - When there is a truly data corrupting error the system panics as quickly as possible. This improves containment of corrupted data and makes sure the corrupted data never hits stable storage. - The panics are synchronized and do not reenter the panic code on multiple CPUs (which currently does not handle this well). - All the errors are reported. Currently it often happens that another CPU happens to do the panic first, but reports useless information (empty machine check) because the real error happened on another CPU which came in later. This is a big advantage on Nehalem where the 8 threads per CPU lead to often the wrong CPU winning the race and dumping useless information on a machine check. The problem also occurs in a less severe form on older CPUs. - The system can detect when no CPUs detected a machine check and shut down the system. This can happen when one CPU is so badly hung that that it cannot process a machine check anymore or when some external agent wants to stop the system by asserting the machine check pin. This follows Intel hardware recommendations. - This matches the recommended error model by the CPU designers. - The events can be output in true severity order - When a panic happens on another CPU it makes sure to be actually be able to process the stop IPI by enabling interrupts. The code is extremly careful to handle timeouts while waiting for other CPUs. It can't rely on the normal timing mechanisms (jiffies, ktime_get) because of its asynchronous/lockless nature, so it uses own timeouts using ndelay() and a "SPINUNIT" The timeout is configurable. By default it waits for upto one second for the other CPUs. This can be also disabled. From some informal testing AMD systems do not see to broadcast machine checks, so right now it's always disabled by default on non Intel CPUs or also on very old Intel systems. Includes fixes from Ying Huang Fixed a "ecception" in a comment (H.Seto) Moved global_nwo reset later based on suggestion from H.Seto v2: Avoid duplicate messages [ Impact: feature, fixes long standing problems. ] Signed-off-by:
Andi Kleen <ak@linux.intel.com> Signed-off-by:
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- May 28, 2009
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Andi Kleen authored
Document that check_interval set to 0 means no polling. Noticed by Hidetoshi Seto Also add a reference from boot options to the sysfs tunables Acked-by:
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by:
Andi Kleen <ak@linux.intel.com> Signed-off-by:
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- May 18, 2009
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Yinghai Lu authored
after: | commit b263295d | Author: Christoph Lameter <clameter@sgi.com> | Date: Wed Jan 30 13:30:47 2008 +0100 | | x86: 64-bit, make sparsemem vmemmap the only memory model we don't have MEMORY_HOTPLUG_RESERVE anymore. Historically, x86-64 had an architecture-specific method for memory hotplug whereby it scanned the SRAT for physical memory ranges that could be potentially used for memory hot-add later. By reserving those ranges without physical memory, the memmap would be allocated and left dormant until needed. This depended on the DISCONTIG memory model which has been removed so the code implementing HOTPLUG_RESERVE is now dead. This patch removes the dead code used by MEMORY_HOTPLUG_RESERVE. (Changelog authored by Mel.) v2: updated changelog, and remove hotadd= in doc [ Impact: remove dead code ] Signed-off-by:
Yinghai Lu <yinghai@kernel.org> Reviewed-by:
Christoph Lameter <cl@linux-foundation.org> Reviewed-by:
Mel Gorman <mel@csn.ul.ie> Workflow-found-OK-by:
Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <4A0C4910.7090508@kernel.org> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- May 11, 2009
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H. Peter Anvin authored
A long ago, in days of yore, it all began with a god named Thor. There were vikings and boats and some plans for a Linux kernel header. Unfortunately, a single 8-bit field was used for bootloader type and version. This has generally worked without *too* much pain, but we're getting close to flat running out of ID fields. Add extension fields for both type and version. The type will be extended if it the old field is 0xE; the version is a simple MSB extension. Keep /proc/sys/kernel/bootloader_type containing (type << 4) + (ver & 0xf) for backwards compatiblity, but also add /proc/sys/kernel/bootloader_version which contains the full version number. [ Impact: new feature to support more bootloaders ] Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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H. Peter Anvin authored
Document the new bzImage fields for kernel memory placement. [ Impact: adds documentation ] Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- May 05, 2009
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H. Peter Anvin authored
Fix a trivial typo in Documentation/x86/x86_64/mm.txt. [ Impact: documentation only ] Signed-off-by:
H. Peter Anvin <hpa@zytor.com> Cc: Rik van Riel <riel@redhat.com>
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Rik van Riel authored
Extend the maximum addressable memory on x86-64 from 2^44 to 2^46 bytes. This requires some shuffling around of the vmalloc and virtual memmap memory areas, to keep them away from the direct mapping of up to 64TB of physical memory. This patch also introduces a guard hole between the vmalloc area and the virtual memory map space. There's really no good reason why we wouldn't have a guard hole there. [ Impact: future hardware enablement ] Signed-off-by:
Rik van Riel <riel@redhat.com> LKML-Reference: <20090505172856.6820db22@cuia.bos.redhat.com> Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- Mar 30, 2009
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Thadeu Lima de Souza Cascardo authored
cgroup documentation was moved to Documentation/cgroups/. There are some places that still refer to Documentation/controllers/, Documentation/cgroups.txt and Documentation/cpusets.txt. Fix those. Signed-off-by:
Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com> Reviewed-by:
Li Zefan <lizf@cn.fujitsu.com> Acked-by:
Paul Menage <menage@google.com> Signed-off-by:
Jiri Kosina <jkosina@suse.cz>
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- Mar 05, 2009
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Yinghai Lu authored
[ mingo: small edits and extensions. ] Signed-off-by:
Yinghai Lu <yinghai@kernel.org> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Greg KH <gregkh@suse.de> Cc: Randy Dunlap <randy.dunlap@oracle.com> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Sarah Sharp <sarah.a.sharp@intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <49AF18B7.4050305@kernel.org> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Jan 15, 2009
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Baodong Chen authored
Modify field names to the right ones: - start_sys was changed to start_sys_seg - iinitrd_addr_max was changed to ramdisk_max - pad2 was changed to pad2 and pad3 - readmode_swtch was changed to realmode_swtch Signed-off-by:
Baodong Chen <[email]chenbdchenbd@gmail.com[email]> Acked-by:
Jiri Kosina <jkosina@suse.cz> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Jan 14, 2009
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H. Peter Anvin authored
Impact: documentation Update the boot protocol specification to include the currently supported file formats and their magic numbers. Signed-off-by:
H. Peter Anvin <hpa@linux.intel.com>
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- Jan 06, 2009
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Randy Dunlap authored
Update several Documentation/ files and a few sub-dir files (only one change in each) to reflect changed header files locations. Signed-off-by:
Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jan 04, 2009
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Baodong Chen authored
Signed-off-by:
Baodong Chen <[email]chenbdchenbd@gmail.com[email]> Acked-by:
Jiri Kosina <jkosina@suse.cz> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Dec 19, 2008
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venkatesh.pallipadi@intel.com authored
Impact: Documentation only. Documentation updates as per Randy Dunlap's comments. Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by:
Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- Dec 18, 2008
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venkatesh.pallipadi@intel.com authored
Impact: Documentation only. Add documentation related to pgprot_* change. Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by:
Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by:
H. Peter Anvin <hpa@zytor.com>
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- Dec 16, 2008
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Philipp Kohlbecher authored
Impact: clarify documentation Documentation/x86/boot.txt describes payload_offset as the offset from the end of the real-mode code. In fact, it is more accurately described as the offset from the beginning of the protected-mode code, as (a) this is how it is actually calculated and (b) the padding after the real-mode code is not included in the offset. Signed-off-by:
Philipp Kohlbecher <xt28@gmx.de> Acked-by:
Ian Campbell <ijc@hellion.org.uk> Acked-by:
H. Peter Anvin <hpa@zytor.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Nov 11, 2008
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KOSAKI Motohiro authored
Impact: documentation fix I met okuji-san (GRUB maintainer) yesterday. He said GRuB isn't correct spelled and he want to fix it. Signed-off-by:
KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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Jiri Slaby authored
Impact: documentation update Commit a6523748 (paravirt/x86, 64-bit: move __PAGE_OFFSET to leave a space for hypervisor) changed address space without changing the documentation. Change it according to the code change -- direct mapping start: ffff810000000000 => ffff880000000000 which gives 57 TiB, something between 45 and 46 bits. Signed-off-by:
Jiri Slaby <jirislaby@gmail.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Nov 03, 2008
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Cyrill Gorcunov authored
Impact: documentation update 1) nmi_watchdog boot parameter is common to 32/64 bit modes. So move it from Documentation/x86/x86_64/boot-options.txt to Documentation/kernel-parameters.txt and integrate with. 2) Also fix [panic] keyword placement -- it ought to be at first position otherwise it will not be recognized. 3) Document lapic and ioapic keywords. Signed-off-by:
Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Oct 28, 2008
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Uwe Hermann authored
The Documentation/i386 and Documentation/x86_64 directories and their contents have been moved into Documentation/x86. Fix references to those files accordingly. Signed-off-by:
Uwe Hermann <uwe@hermann-uwe.de> Signed-off-by:
Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Sep 22, 2008
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FUJITA Tomonori authored
This patch against tip/x86/iommu virtually reverts 2842e5bf. But just reverting the commit breaks AMD IOMMU so this patch also includes some fixes. The above commit adds new two options to x86 IOMMU generic kernel boot options, fullflush and nofullflush. But such change that affects all the IOMMUs needs more discussion (all IOMMU parties need the chance to discuss it): http://lkml.org/lkml/2008/9/19/106 Signed-off-by:
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by:
Joerg Roedel <joerg.roedel@amd.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Sep 19, 2008
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Joerg Roedel authored
The GART currently implements the iommu=[no]fullflush command line parameters which influence its IO/TLB flushing strategy. This patch makes these parameters generic so that they can be used by the AMD IOMMU too. Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Aug 28, 2008
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Luiz Fernando N. Capitulino authored
Commit ecd29476 removed the "disable_8254_timer" and "enable_8254_timer" kernel parameters from the kernel but did not remove the references to them from two files in the Documentation directory: kernel-parameters.txt and x86/x86_64/boot-options.txt. This change completes the removal. Signed-off-by:
Luiz Fernando N. Capitulino <lcapitulino@mandriva.com.br> Acked-by:
Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- Aug 21, 2008
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venkatesh.pallipadi@intel.com authored
Documentation update for PAT. Reflect the latest API details. Also, adds details about ways to get more info in order to debug PAT. Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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