Commit fb593cf3 authored by Russell King's avatar Russell King
Browse files

clocksource: ARM sp804: allow clocksource name to be specified



This allows platforms to specify the clocksource name upon
registration, which is necessary should they wish to register more
than one sp804 clocksource.
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 933e54a5
......@@ -32,7 +32,7 @@
#define TIMER_FREQ_KHZ (1000)
#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
void __init sp804_clocksource_init(void __iomem *base)
void __init sp804_clocksource_init(void __iomem *base, const char *name)
{
/* setup timer 0 as free-running clocksource */
writel(0, base + TIMER_CTRL);
......@@ -41,7 +41,7 @@ void __init sp804_clocksource_init(void __iomem *base)
writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
base + TIMER_CTRL);
clocksource_mmio_init(base + TIMER_VALUE, "timer3",
clocksource_mmio_init(base + TIMER_VALUE, name,
TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down);
}
......
void sp804_clocksource_init(void __iomem *);
void sp804_clocksource_init(void __iomem *, const char *);
void sp804_clockevents_init(void __iomem *, unsigned int);
......@@ -476,7 +476,7 @@ static void __init intcp_timer_init(void)
writel(0, TIMER1_VA_BASE + TIMER_CTRL);
writel(0, TIMER2_VA_BASE + TIMER_CTRL);
sp804_clocksource_init(TIMER2_VA_BASE);
sp804_clocksource_init(TIMER2_VA_BASE, "timer2");
sp804_clockevents_init(TIMER1_VA_BASE, IRQ_TIMERINT1);
}
......
......@@ -545,7 +545,7 @@ void __init realview_timer_init(unsigned int timer_irq)
writel(0, timer2_va_base + TIMER_CTRL);
writel(0, timer3_va_base + TIMER_CTRL);
sp804_clocksource_init(timer3_va_base);
sp804_clocksource_init(timer3_va_base, "timer3");
sp804_clockevents_init(timer0_va_base, timer_irq);
}
......
......@@ -764,7 +764,7 @@ static void __init versatile_timer_init(void)
writel(0, TIMER2_VA_BASE + TIMER_CTRL);
writel(0, TIMER3_VA_BASE + TIMER_CTRL);
sp804_clocksource_init(TIMER3_VA_BASE);
sp804_clocksource_init(TIMER3_VA_BASE, "timer3");
sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1);
}
......
......@@ -71,7 +71,7 @@ static void __init ct_ca9x4_timer_init(void)
writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL);
writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL);
sp804_clocksource_init(MMIO_P2V(CT_CA9X4_TIMER1));
sp804_clocksource_init(MMIO_P2V(CT_CA9X4_TIMER1), "ct-timer1");
sp804_clockevents_init(MMIO_P2V(CT_CA9X4_TIMER0), IRQ_CT_CA9X4_TIMER0);
}
......
......@@ -65,7 +65,7 @@ static void __init v2m_timer_init(void)
writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
sp804_clocksource_init(MMIO_P2V(V2M_TIMER1));
sp804_clocksource_init(MMIO_P2V(V2M_TIMER1), "v2m-timer1");
sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
}
......
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