Commit f71e1309 authored by Arjan van de Ven's avatar Arjan van de Ven Committed by Jeff Garzik
Browse files

Massive net driver const-ification.

parent c499ec24
......@@ -841,7 +841,7 @@ enum xcvr_types {
XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
};
static struct media_table {
static const struct media_table {
char *name;
unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
mask:8, /* The transceiver-present bit in Wn3_Config.*/
......@@ -1445,7 +1445,7 @@ static int __devinit vortex_probe1(struct device *gendev,
}
{
static const char * ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
static const char * const ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
unsigned int config;
EL3WINDOW(3);
vp->available_media = ioread16(ioaddr + Wn3_Options);
......
......@@ -1276,7 +1276,7 @@ static int cp_change_mtu(struct net_device *dev, int new_mtu)
}
#endif /* BROKEN */
static char mii_2_8139_map[8] = {
static const char mii_2_8139_map[8] = {
BasicModeCtrl,
BasicModeStatus,
0,
......
......@@ -229,7 +229,7 @@ typedef enum {
/* indexed by board_t, above */
static struct {
static const struct {
const char *name;
u32 hw_flags;
} board_info[] __devinitdata = {
......@@ -1192,7 +1192,7 @@ static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_l
#define mdio_delay() RTL_R8(Config4)
static char mii_2_8139_map[8] = {
static const char mii_2_8139_map[8] = {
BasicModeCtrl,
BasicModeStatus,
0,
......
......@@ -46,7 +46,7 @@ typedef enum {
} board_t;
/* indexed by board_t, above */
static struct {
static const struct {
char *name;
} board_info[] __devinitdata = {
{ "Broadcom NetXtreme II BCM5706 1000Base-T" },
......@@ -3476,7 +3476,7 @@ bnx2_test_registers(struct bnx2 *bp)
{
int ret;
int i;
static struct {
static const struct {
u16 offset;
u16 flags;
u32 rw_mask;
......@@ -3891,7 +3891,7 @@ reg_test_err:
static int
bnx2_do_mem_test(struct bnx2 *bp, u32 start, u32 size)
{
static u32 test_pattern[] = { 0x00000000, 0xffffffff, 0x55555555,
static const u32 test_pattern[] = { 0x00000000, 0xffffffff, 0x55555555,
0xaaaaaaaa , 0xaa55aa55, 0x55aa55aa };
int i;
......@@ -3916,7 +3916,7 @@ bnx2_test_memory(struct bnx2 *bp)
{
int ret = 0;
int i;
static struct {
static const struct {
u32 offset;
u32 len;
} mem_tbl[] = {
......@@ -5122,7 +5122,7 @@ static struct {
#define STATS_OFFSET32(offset_name) (offsetof(struct statistics_block, offset_name) / 4)
static unsigned long bnx2_stats_offset_arr[BNX2_NUM_STATS] = {
static const unsigned long bnx2_stats_offset_arr[BNX2_NUM_STATS] = {
STATS_OFFSET32(stat_IfHCInOctets_hi),
STATS_OFFSET32(stat_IfHCInBadOctets_hi),
STATS_OFFSET32(stat_IfHCOutOctets_hi),
......
......@@ -14,20 +14,20 @@
* accompanying it.
*/
static int bnx2_COM_b06FwReleaseMajor = 0x1;
static int bnx2_COM_b06FwReleaseMinor = 0x0;
static int bnx2_COM_b06FwReleaseFix = 0x0;
static u32 bnx2_COM_b06FwStartAddr = 0x080008b4;
static u32 bnx2_COM_b06FwTextAddr = 0x08000000;
static int bnx2_COM_b06FwTextLen = 0x57bc;
static u32 bnx2_COM_b06FwDataAddr = 0x08005840;
static int bnx2_COM_b06FwDataLen = 0x0;
static u32 bnx2_COM_b06FwRodataAddr = 0x080057c0;
static int bnx2_COM_b06FwRodataLen = 0x58;
static u32 bnx2_COM_b06FwBssAddr = 0x08005860;
static int bnx2_COM_b06FwBssLen = 0x88;
static u32 bnx2_COM_b06FwSbssAddr = 0x08005840;
static int bnx2_COM_b06FwSbssLen = 0x1c;
static const int bnx2_COM_b06FwReleaseMajor = 0x1;
static const int bnx2_COM_b06FwReleaseMinor = 0x0;
static const int bnx2_COM_b06FwReleaseFix = 0x0;
static const u32 bnx2_COM_b06FwStartAddr = 0x080008b4;
static const u32 bnx2_COM_b06FwTextAddr = 0x08000000;
static const int bnx2_COM_b06FwTextLen = 0x57bc;
static const u32 bnx2_COM_b06FwDataAddr = 0x08005840;
static const int bnx2_COM_b06FwDataLen = 0x0;
static const u32 bnx2_COM_b06FwRodataAddr = 0x080057c0;
static const int bnx2_COM_b06FwRodataLen = 0x58;
static const u32 bnx2_COM_b06FwBssAddr = 0x08005860;
static const int bnx2_COM_b06FwBssLen = 0x88;
static const u32 bnx2_COM_b06FwSbssAddr = 0x08005840;
static const int bnx2_COM_b06FwSbssLen = 0x1c;
static u32 bnx2_COM_b06FwText[(0x57bc/4) + 1] = {
0x0a00022d, 0x00000000, 0x00000000, 0x0000000d, 0x636f6d20, 0x322e352e,
0x38000000, 0x02050802, 0x00000000, 0x00000003, 0x00000014, 0x00000032,
......@@ -2325,20 +2325,20 @@ static u32 bnx2_rv2p_proc2[] = {
0x0000000c, 0x29520000, 0x00000018, 0x80000002, 0x0000000c, 0x29800000,
0x00000018, 0x00570000 };
static int bnx2_TPAT_b06FwReleaseMajor = 0x1;
static int bnx2_TPAT_b06FwReleaseMinor = 0x0;
static int bnx2_TPAT_b06FwReleaseFix = 0x0;
static u32 bnx2_TPAT_b06FwStartAddr = 0x08000860;
static u32 bnx2_TPAT_b06FwTextAddr = 0x08000800;
static int bnx2_TPAT_b06FwTextLen = 0x122c;
static u32 bnx2_TPAT_b06FwDataAddr = 0x08001a60;
static int bnx2_TPAT_b06FwDataLen = 0x0;
static u32 bnx2_TPAT_b06FwRodataAddr = 0x00000000;
static int bnx2_TPAT_b06FwRodataLen = 0x0;
static u32 bnx2_TPAT_b06FwBssAddr = 0x08001aa0;
static int bnx2_TPAT_b06FwBssLen = 0x250;
static u32 bnx2_TPAT_b06FwSbssAddr = 0x08001a60;
static int bnx2_TPAT_b06FwSbssLen = 0x34;
static const int bnx2_TPAT_b06FwReleaseMajor = 0x1;
static const int bnx2_TPAT_b06FwReleaseMinor = 0x0;
static const int bnx2_TPAT_b06FwReleaseFix = 0x0;
static const u32 bnx2_TPAT_b06FwStartAddr = 0x08000860;
static const u32 bnx2_TPAT_b06FwTextAddr = 0x08000800;
static const int bnx2_TPAT_b06FwTextLen = 0x122c;
static const u32 bnx2_TPAT_b06FwDataAddr = 0x08001a60;
static const int bnx2_TPAT_b06FwDataLen = 0x0;
static const u32 bnx2_TPAT_b06FwRodataAddr = 0x00000000;
static const int bnx2_TPAT_b06FwRodataLen = 0x0;
static const u32 bnx2_TPAT_b06FwBssAddr = 0x08001aa0;
static const int bnx2_TPAT_b06FwBssLen = 0x250;
static const u32 bnx2_TPAT_b06FwSbssAddr = 0x08001a60;
static const int bnx2_TPAT_b06FwSbssLen = 0x34;
static u32 bnx2_TPAT_b06FwText[(0x122c/4) + 1] = {
0x0a000218, 0x00000000, 0x00000000, 0x0000000d, 0x74706174, 0x20322e35,
0x2e313100, 0x02050b01, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
......@@ -2540,20 +2540,20 @@ static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
static u32 bnx2_TPAT_b06FwBss[(0x250/4) + 1] = { 0x0 };
static u32 bnx2_TPAT_b06FwSbss[(0x34/4) + 1] = { 0x0 };
static int bnx2_TXP_b06FwReleaseMajor = 0x1;
static int bnx2_TXP_b06FwReleaseMinor = 0x0;
static int bnx2_TXP_b06FwReleaseFix = 0x0;
static u32 bnx2_TXP_b06FwStartAddr = 0x080034b0;
static u32 bnx2_TXP_b06FwTextAddr = 0x08000000;
static int bnx2_TXP_b06FwTextLen = 0x5748;
static u32 bnx2_TXP_b06FwDataAddr = 0x08005760;
static int bnx2_TXP_b06FwDataLen = 0x0;
static u32 bnx2_TXP_b06FwRodataAddr = 0x00000000;
static int bnx2_TXP_b06FwRodataLen = 0x0;
static u32 bnx2_TXP_b06FwBssAddr = 0x080057a0;
static int bnx2_TXP_b06FwBssLen = 0x1c4;
static u32 bnx2_TXP_b06FwSbssAddr = 0x08005760;
static int bnx2_TXP_b06FwSbssLen = 0x38;
static const int bnx2_TXP_b06FwReleaseMajor = 0x1;
static const int bnx2_TXP_b06FwReleaseMinor = 0x0;
static const int bnx2_TXP_b06FwReleaseFix = 0x0;
static const u32 bnx2_TXP_b06FwStartAddr = 0x080034b0;
static const u32 bnx2_TXP_b06FwTextAddr = 0x08000000;
static const int bnx2_TXP_b06FwTextLen = 0x5748;
static const u32 bnx2_TXP_b06FwDataAddr = 0x08005760;
static const int bnx2_TXP_b06FwDataLen = 0x0;
static const u32 bnx2_TXP_b06FwRodataAddr = 0x00000000;
static const int bnx2_TXP_b06FwRodataLen = 0x0;
static const u32 bnx2_TXP_b06FwBssAddr = 0x080057a0;
static const int bnx2_TXP_b06FwBssLen = 0x1c4;
static const u32 bnx2_TXP_b06FwSbssAddr = 0x08005760;
static const int bnx2_TXP_b06FwSbssLen = 0x38;
static u32 bnx2_TXP_b06FwText[(0x5748/4) + 1] = {
0x0a000d2c, 0x00000000, 0x00000000, 0x0000000d, 0x74787020, 0x322e352e,
0x38000000, 0x02050800, 0x0000000a, 0x000003e8, 0x0000ea60, 0x00000000,
......
......@@ -1261,7 +1261,7 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)
struct ethhdr *eth_data;
struct alb_bond_info *bond_info = &(BOND_ALB_INFO(bond));
struct slave *tx_slave = NULL;
static u32 ip_bcast = 0xffffffff;
static const u32 ip_bcast = 0xffffffff;
int hash_size = 0;
int do_tx_balance = 1;
u32 hash_index = 0;
......
......@@ -131,7 +131,7 @@ MODULE_PARM_DESC(arp_ip_target, "arp targets in n.n.n.n form");
/*----------------------------- Global variables ----------------------------*/
static const char *version =
static const char * const version =
DRV_DESCRIPTION ": v" DRV_VERSION " (" DRV_RELDATE ")\n";
LIST_HEAD(bond_dev_list);
......
......@@ -686,7 +686,7 @@ int t1_init_hw_modules(adapter_t *adapter)
*/
static void __devinit get_pci_mode(adapter_t *adapter, struct chelsio_pci_params *p)
{
static unsigned short speed_map[] = { 33, 66, 100, 133 };
static const unsigned short speed_map[] = { 33, 66, 100, 133 };
u32 pci_mode;
pci_read_config_dword(adapter->pdev, A_PCICFG_MODE, &pci_mode);
......
......@@ -993,7 +993,7 @@ dgrs_download(struct net_device *dev0)
int is;
unsigned long i;
static int iv2is[16] = {
static const int iv2is[16] = {
0, 0, 0, ES4H_IS_INT3,
0, ES4H_IS_INT5, 0, ES4H_IS_INT7,
0, 0, ES4H_IS_INT10, ES4H_IS_INT11,
......
static int dgrs_firmnum = 550;
static const int dgrs_firmnum = 550;
static char dgrs_firmver[] = "$Version$";
static char dgrs_firmdate[] = "11/16/96 03:45:15";
static unsigned char dgrs_code[] __initdata = {
......@@ -9963,4 +9963,4 @@ static unsigned char dgrs_code[] __initdata = {
109,46,99,0,114,99,0,0,48,120,0,0,
0,0,0,0,0,0,0,0,0,0,0,0
} ;
static int dgrs_ncode = 119520 ;
static const int dgrs_ncode = 119520 ;
......@@ -90,8 +90,8 @@ module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */
#define EnableInt() \
writew(DEFAULT_INTR, ioaddr + IntEnable)
static int max_intrloop = 50;
static int multicast_filter_limit = 0x40;
static const int max_intrloop = 50;
static const int multicast_filter_limit = 0x40;
static int rio_open (struct net_device *dev);
static void rio_timer (unsigned long data);
......
......@@ -27,7 +27,7 @@
rx_align support: enables rx DMA without causing unaligned accesses.
*/
static const char *version =
static const char * const version =
"eepro100.c:v1.09j-t 9/29/99 Donald Becker http://www.scyld.com/network/eepro100.html\n"
"eepro100.c: $Revision: 1.36 $ 2000/11/17 Modified by Andrey V. Savochkin <saw@saw.sw.com.sg> and others\n";
......@@ -469,7 +469,7 @@ static const char i82558_config_cmd[CONFIG_DATA_SIZE] = {
0x31, 0x05, };
/* PHY media interface chips. */
static const char *phys[] = {
static const char * const phys[] = {
"None", "i82553-A/B", "i82553-C", "i82503",
"DP83840", "80c240", "80c24", "i82555",
"unknown-8", "unknown-9", "DP83840A", "unknown-11",
......
......@@ -225,7 +225,7 @@ struct epic_chip_info {
/* indexed by chip_t */
static struct epic_chip_info pci_id_tbl[] = {
static const struct epic_chip_info pci_id_tbl[] = {
{ "SMSC EPIC/100 83c170",
EPIC_IOTYPE, EPIC_TOTAL_SIZE, TYPE2_INTR | NO_MII | MII_PWRDWN },
{ "SMSC EPIC/100 83c170",
......@@ -291,7 +291,7 @@ enum CommandBits {
RxDone | RxStarted | RxEarlyWarn | RxOverflow | RxFull)
#define EpicNormalEvent (0x0000ffff & ~EpicNapiEvent)
static u16 media2miictl[16] = {
static const u16 media2miictl[16] = {
0, 0x0C00, 0x0C00, 0x2000, 0x0100, 0x2100, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 };
......
......@@ -160,7 +160,7 @@ struct chip_info {
int flags;
};
static struct chip_info skel_netdrv_tbl[] = {
static const struct chip_info skel_netdrv_tbl[] = {
{"100/10M Ethernet PCI Adapter", 136, HAS_MII_XCVR},
{"100/10M Ethernet PCI Adapter", 136, HAS_CHIP_XCVR},
{"1000/100/10M Ethernet PCI Adapter", 136, HAS_MII_XCVR},
......
......@@ -427,7 +427,7 @@ that case.
static void hamachi_timer(unsigned long data);
enum capability_flags {CanHaveMII=1, };
static struct chip_info {
static const struct chip_info {
u16 vendor_id, device_id, device_id_mask, pad;
const char *name;
void (*media_timer)(unsigned long data);
......
......@@ -189,7 +189,7 @@ static int mtu;
/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
This chip uses a 512 element hash table based on the Ethernet CRC. */
static int multicast_filter_limit = 100;
static const int multicast_filter_limit = 100;
/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
Setting to > 1518 effectively disables this feature. */
......@@ -374,7 +374,7 @@ enum pcistuff {
/* array of board data directly indexed by pci_tbl[x].driver_data */
static struct {
static const struct {
const char *name;
unsigned long flags;
} natsemi_pci_info[] __devinitdata = {
......
......@@ -117,7 +117,7 @@ enum ne2k_pci_chipsets {
};
static struct {
static const struct {
char *name;
int flags;
} pci_clone_list[] __devinitdata = {
......
......@@ -651,7 +651,7 @@ static void FASTCALL(phy_intr(struct net_device *ndev));
static void fastcall phy_intr(struct net_device *ndev)
{
struct ns83820 *dev = PRIV(ndev);
static char *speeds[] = { "10", "100", "1000", "1000(?)", "1000F" };
static const char *speeds[] = { "10", "100", "1000", "1000(?)", "1000F" };
u32 cfg, new_cfg;
u32 tbisr, tanar, tanlpar;
int speed, fullduplex, newlinkstate;
......
......@@ -341,7 +341,7 @@ static void tc574_detach(struct pcmcia_device *p_dev)
#define CS_CHECK(fn, ret) \
do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
static char *ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
static const char *ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
static void tc574_config(dev_link_t *link)
{
......
......@@ -115,7 +115,7 @@ struct el3_private {
spinlock_t lock;
};
static char *if_names[] = { "auto", "10baseT", "10base2", "AUI" };
static const char *if_names[] = { "auto", "10baseT", "10base2", "AUI" };
/*====================================================================*/
......
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