Commit e7c4782f authored by Ralf Baechle's avatar Ralf Baechle
Browse files

[MIPS] Put an end to <asm/serial.h>'s long and annyoing existence


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 192cca6e
......@@ -155,7 +155,6 @@ config MIPS_MALTA
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
select HAVE_STD_PC_SERIAL_PORT
select DMA_NONCOHERENT
select GENERIC_ISA_DMA
select IRQ_CPU
......
......@@ -2,7 +2,8 @@
# Makefile for NEC DDB-Vrc5477 board
#
obj-y += irq.o irq_5477.o setup.o lcd44780.o
obj-y += ddb5477-platform.o irq.o irq_5477.o setup.o \
lcd44780.o
obj-$(CONFIG_RUNTIME_DEBUG) += debug.o
obj-$(CONFIG_KGDB) += kgdb_io.o
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/serial_8250.h>
#include <asm/ddb5xxx/ddb5477.h>
#define DDB_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
#define DDB5477_PORT(base, int) \
{ \
.mapbase = base, \
.irq = int, \
.uartclk = 1843200, \
.iotype = UPIO_MEM, \
.flags = DDB_UART_FLAGS, \
.regshift = 3, \
}
static struct plat_serial8250_port uart8250_data[] = {
DDB5477_PORT(0xbfa04200, VRC5477_IRQ_UART0),
DDB5477_PORT(0xbfa04240, VRC5477_IRQ_UART1),
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for the NEC DDB5477");
......@@ -2,6 +2,6 @@
# Makefile for Momentum's Ocelot board.
#
obj-y += irq.o prom.o reset.o setup.o
obj-y += irq.o ocelot-platform.o prom.o reset.o setup.o
obj-$(CONFIG_KGDB) += dbg_io.o
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*
* A NS16552 DUART with a 20MHz crystal.
*
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#define OCELOT_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
static struct plat_serial8250_port uart8250_data[] = {
{
.mapbase = 0xe0001020,
.irq = 4,
.uartclk = 20000000,
.iotype = UPIO_MEM,
.flags = OCELOT_UART_FLAGS,
.regshift = 2,
},
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for the Momenco Ocelot");
......@@ -2,4 +2,4 @@
# Makefile for the Jazz family specific parts of the kernel
#
obj-y := irq.o jazzdma.o reset.o setup.o
obj-y := irq.o jazzdma.o jazz-platform.o reset.o setup.o
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/serial_8250.h>
#include <asm/jazz.h>
/*
* Confusion ... It seems the original Microsoft Jazz machine used to have a
* 4.096MHz clock for its UART while the MIPS Magnum and Millenium systems
* had 8MHz. The Olivetti M700-10 and the Acer PICA have 1.8432MHz like PCs.
*/
#ifdef CONFIG_OLIVETTI_M700
#define JAZZ_BASE_BAUD 1843200
#else
#define JAZZ_BASE_BAUD 8000000 /* 3072000 */
#endif
#define JAZZ_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
#define JAZZ_PORT(base, int) \
{ \
.mapbase = base, \
.irq = int, \
.uartclk = JAZZ_BASE_BAUD, \
.iotype = UPIO_MEM, \
.flags = JAZZ_UART_FLAGS, \
.regshift = 0, \
}
static struct plat_serial8250_port uart8250_data[] = {
JAZZ_PORT(JAZZ_SERIAL1_BASE, JAZZ_SERIAL1_IRQ),
JAZZ_PORT(JAZZ_SERIAL2_BASE, JAZZ_SERIAL2_IRQ),
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for the Jazz family");
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#define PORT(base, int) \
{ \
.iobase = base, \
.irq = int, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
.regshift = 0, \
}
static struct plat_serial8250_port uart8250_data[] = {
PORT(0x3F8, 4),
PORT(0x2F8, 3),
PORT(0x3E8, 4),
PORT(0x2E8, 3),
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Generic 8250 UART probe driver");
......@@ -68,3 +68,5 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o
......@@ -19,6 +19,7 @@
# under Linux.
#
obj-y := malta_int.o malta_setup.o
obj-y := malta_int.o malta_platform.o malta_setup.o
obj-$(CONFIG_MTD) += malta_mtd.o
obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 MIPS Technologies, Inc.
* written by Ralf Baechle (ralf@linux-mips.org)
*
* Probe driver for the Malta's UART ports:
*
* o 2 ports in the SMC SuperIO
* o 1 port in the CBUS UART, a discrete 16550 which normally is only used
* for bringups.
*
* We don't use 8250_platform.c on Malta as it would result in the CBUS
* UART becoming ttyS0.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#define SMC_PORT(base, int) \
{ \
.iobase = base, \
.irq = int, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
.regshift = 0, \
}
#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
static struct plat_serial8250_port uart8250_data[] = {
SMC_PORT(0x3F8, 4),
SMC_PORT(0x2F8, 3),
{
.mapbase = 0x1f000900, /* The CBUS UART */
.irq = MIPS_CPU_IRQ_BASE + 2,
.uartclk = 3686400, /* Twice the usual clk! */
.iotype = UPIO_MEM32,
.flags = CBUS_UART_FLAGS,
.regshift = 3,
},
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM2,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for the Malta CBUS UART");
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2006, 07 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2007 Dale Farnsworth (dale@farnsworth.org)
*/
#include <linux/delay.h>
#include <linux/if_ether.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/mv643xx.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include "ocelot_3_fpga.h"
......@@ -206,3 +217,36 @@ static int __init mv643xx_eth_add_pds(void)
device_initcall(mv643xx_eth_add_pds);
#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
#define OCELOT3_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
static struct plat_serial8250_port uart8250_data[] = {
{
.membase = (signed long) 0xfd000020,
.irq = 6,
.uartclk = 20000000,
.iotype = UPIO_MEM,
.flags = OCELOT3_UART_FLAGS,
.regshift = 2,
},
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
return platform_device_register(&uart8250_device);
}
module_init(uart8250_init);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for the Ocelot 3");
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <asm/ip32/mace.h>
#include <asm/ip32/ip32_ints.h>
/*
* .iobase isn't a constant (in the sense of C) so we fill it in at runtime.
*/
#define MACE_PORT(int) \
{ \
.irq = int, \
.uartclk = 1843200, \
.iotype = UPIO_MEM, \
.flags = UPF_SKIP_TEST, \
.regshift = 8, \
}
static struct plat_serial8250_port uart8250_data[] = {
MACE_PORT(MACEISA_SERIAL1_IRQ),
MACE_PORT(MACEISA_SERIAL2_IRQ),
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
{
uart8250_data[0].iobase = (unsigned long) &mace->isa.serial1;
uart8250_data[1].iobase = (unsigned long) &mace->isa.serial1;
return platform_device_register(&uart8250_device);
}
device_initcall(uart8250_init);
static __init int meth_devinit(void)
{
......@@ -18,3 +66,7 @@ static __init int meth_devinit(void)
}
device_initcall(meth_devinit);
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
......@@ -62,12 +62,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
}
#endif
#ifdef CONFIG_SERIAL_8250
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#endif /* CONFIG_SERIAL_8250 */
/* An arbitrary time; this can be decreased if reliability looks good */
#define WAIT_MS 10
......@@ -96,36 +90,6 @@ void __init plat_mem_setup(void)
board_time_init = ip32_time_init;
#ifdef CONFIG_SERIAL_8250
{
static struct uart_port o2_serial[2];
memset(o2_serial, 0, sizeof(o2_serial));
o2_serial[0].type = PORT_16550A;
o2_serial[0].line = 0;
o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
o2_serial[0].flags = UPF_SKIP_TEST;
o2_serial[0].uartclk = 1843200;
o2_serial[0].iotype = UPIO_MEM;
o2_serial[0].membase = (char *)&mace->isa.serial1;
o2_serial[0].fifosize = 14;
/* How much to shift register offset by. Each UART register
* is replicated over 256 byte space */
o2_serial[0].regshift = 8;
o2_serial[1].type = PORT_16550A;
o2_serial[1].line = 1;
o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
o2_serial[1].flags = UPF_SKIP_TEST;
o2_serial[1].uartclk = 1843200;
o2_serial[1].iotype = UPIO_MEM;
o2_serial[1].membase = (char *)&mace->isa.serial2;
o2_serial[1].fifosize = 14;
o2_serial[1].regshift = 8;
early_serial_setup(&o2_serial[0]);
early_serial_setup(&o2_serial[1]);
}
#endif
#ifdef CONFIG_SGI_O2MACE_ETH
{
char *mac = ArcGetEnvironmentVariable("eaddr");
......
......@@ -19,114 +19,4 @@
*/
#define BASE_BAUD (1843200 / 16)
/* Standard COM flags (except for COM4, because of the 8514 problem) */
#ifdef CONFIG_SERIAL_DETECT_IRQ
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
#else
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
#endif
#ifdef CONFIG_MACH_JAZZ
#include <asm/jazz.h>
#ifndef CONFIG_OLIVETTI_M700
/* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
exactly which ones ... XXX */
#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
#else
/* but the M700 isn't such a strange beast */
#define JAZZ_BASE_BAUD BASE_BAUD
#endif
#define _JAZZ_SERIAL_INIT(int, base) \
{ .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
.iomem_base = (u8 *) base, .iomem_reg_shift = 0, \
.io_type = SERIAL_IO_MEM }
#define JAZZ_SERIAL_PORT_DEFNS \
_JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \
_JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
#else
#define JAZZ_SERIAL_PORT_DEFNS
#endif
#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
#define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
{ 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
{ 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
{ 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
#define STD_SERIAL_PORT_DEFNS
#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
#ifdef CONFIG_MOMENCO_OCELOT_3
#define OCELOT_3_BASE_BAUD ( 20000000 / 16 )
#define OCELOT_3_SERIAL_IRQ 6
#define OCELOT_3_SERIAL_BASE (signed)0xfd000020
#define _OCELOT_3_SERIAL_INIT(int, base) \
{ .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
.flags = STD_COM_FLAGS, \
.iomem_base = (u8 *) base, iomem_reg_shift: 2, \
io_type: SERIAL_IO_MEM }
#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
_OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE)
#else
#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
#endif
#ifdef CONFIG_MOMENCO_OCELOT
/* Ordinary NS16552 duart with a 20MHz crystal. */
#define OCELOT_BASE_BAUD ( 20000000 / 16 )
#define OCELOT_SERIAL1_IRQ 4
#define OCELOT_SERIAL1_BASE 0xe0001020
#define _OCELOT_SERIAL_INIT(int, base) \
{ .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
.iomem_base = (u8 *) base, .iomem_reg_shift = 2, \
.io_type = SERIAL_IO_MEM }
#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
_OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
#else
#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
#endif
#ifdef CONFIG_DDB5477
#include <asm/ddb5xxx/ddb5477.h>
#define DDB5477_SERIAL_PORT_DEFNS \
{ .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \
.flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \
.iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \
{ .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \
.flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \
.iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
#else
#define DDB5477_SERIAL_PORT_DEFNS
#endif
#ifdef CONFIG_SGI_IP32
/*
* The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
* They are initialized in ip32_setup
*/
#define IP32_SERIAL_PORT_DEFNS \
{},{},
#else
#define IP32_SERIAL_PORT_DEFNS
#endif /* CONFIG_SGI_IP32 */
#define SERIAL_PORT_DFNS \
DDB5477_SERIAL_PORT_DEFNS \
IP32_SERIAL_PORT_DEFNS \
JAZZ_SERIAL_PORT_DEFNS \
STD_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
#endif /* _ASM_SERIAL_H */
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