[MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.
The BCM148 has 4 cores but there are also just 4 generic timers available
so use the ZBbus cycle counter instead of it. In addition the ZBbus
counter also offers a much higher resolution and 64-bit counting so I'm
considering a later complete conversion to it once I figure out if all
members of the Sibyte SOC family support it - the docs seem to agree but
the headers files seem to disagree ...
Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- arch/mips/sibyte/bcm1480/irq.c 41 additions, 34 deletionsarch/mips/sibyte/bcm1480/irq.c
- arch/mips/sibyte/bcm1480/smp.c 2 additions, 2 deletionsarch/mips/sibyte/bcm1480/smp.c
- arch/mips/sibyte/bcm1480/time.c 50 additions, 67 deletionsarch/mips/sibyte/bcm1480/time.c
- arch/mips/sibyte/sb1250/irq.c 19 additions, 16 deletionsarch/mips/sibyte/sb1250/irq.c
- arch/mips/sibyte/sb1250/smp.c 2 additions, 2 deletionsarch/mips/sibyte/sb1250/smp.c
- arch/mips/sibyte/sb1250/time.c 44 additions, 44 deletionsarch/mips/sibyte/sb1250/time.c
- include/asm-mips/sibyte/sb1250.h 0 additions, 2 deletionsinclude/asm-mips/sibyte/sb1250.h
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