Commit ce8337cb authored by Russell King's avatar Russell King Committed by Russell King
Browse files

[SERIAL] Don't use ASYNC_ constants with the uart_port structure


Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent f91a3715
......@@ -366,7 +366,7 @@ static struct uart_port serial21285_port = {
.irq = NO_IRQ,
.fifosize = 16,
.ops = &serial21285_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
};
static void serial21285_setup_ports(void)
......
......@@ -566,7 +566,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
.uartclk = 14745600,
.fifosize = 16,
.ops = &amba_pl010_pops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.dtr_mask = 1 << 5,
......@@ -581,7 +581,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
.uartclk = 14745600,
.fifosize = 16,
.ops = &amba_pl010_pops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.dtr_mask = 1 << 7,
......
......@@ -410,7 +410,7 @@ static struct uart_port clps711x_ports[UART_NR] = {
.fifosize = 16,
.ops = &clps711x_pops,
.line = 0,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
},
{
.iobase = SYSCON2,
......@@ -419,7 +419,7 @@ static struct uart_port clps711x_ports[UART_NR] = {
.fifosize = 16,
.ops = &clps711x_pops,
.line = 1,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
}
};
......
......@@ -674,7 +674,7 @@ static struct imx_port imx_ports[] = {
.irq = UART1_MINT_RX,
.uartclk = 16000000,
.fifosize = 8,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.ops = &imx_pops,
.line = 0,
},
......@@ -690,7 +690,7 @@ static struct imx_port imx_ports[] = {
.irq = UART2_MINT_RX,
.uartclk = 16000000,
.fifosize = 8,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.ops = &imx_pops,
.line = 1,
},
......
......@@ -665,21 +665,21 @@ void __init sa1100_register_uart(int idx, int port)
sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
sa1100_ports[idx].port.irq = IRQ_Ser1UART;
sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
break;
case 2:
sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
break;
case 3:
sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
sa1100_ports[idx].port.irq = IRQ_Ser3UART;
sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
break;
default:
......
......@@ -506,7 +506,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.uartclk = 14745600/2,
.fifosize = 16,
.ops = &lh7a40x_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
},
......@@ -519,7 +519,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.uartclk = 14745600/2,
.fifosize = 16,
.ops = &lh7a40x_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
},
......@@ -532,7 +532,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.uartclk = 14745600/2,
.fifosize = 16,
.ops = &lh7a40x_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
},
......
......@@ -1113,10 +1113,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xfffffe80,
.mapbase = 0xfffffe80,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
......@@ -1128,10 +1128,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)SCIF0,
.mapbase = SCIF0,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 55,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
......@@ -1142,10 +1142,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)SCIF2,
.mapbase = SCIF2,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 59,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
......@@ -1157,10 +1157,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xfffffe80,
.mapbase = 0xfffffe80,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
......@@ -1171,10 +1171,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xa4000150,
.mapbase = 0xa4000150,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 59,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
......@@ -1185,10 +1185,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xa4000140,
.mapbase = 0xa4000140,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 55,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_IRDA,
......@@ -1200,10 +1200,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xA4430000,
.mapbase = 0xA4430000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
......@@ -1215,10 +1215,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
......@@ -1230,10 +1230,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xffe80000,
.mapbase = 0xffe80000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
......@@ -1245,10 +1245,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 25,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
......@@ -1259,10 +1259,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xffe80000,
.mapbase = 0xffe80000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
......@@ -1274,10 +1274,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xfe600000,
.mapbase = 0xfe600000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 55,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
......@@ -1288,10 +1288,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xfe610000,
.mapbase = 0xfe610000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 75,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
......@@ -1302,10 +1302,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xfe620000,
.mapbase = 0xfe620000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 79,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_SCIF,
......@@ -1317,10 +1317,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xffe80000,
.mapbase = 0xffe80000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
......@@ -1332,10 +1332,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 26,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
......@@ -1346,10 +1346,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0xffe80000,
.mapbase = 0xffe80000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
......@@ -1359,10 +1359,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
{
.port = {
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 42,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
......@@ -1374,10 +1374,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0x00ffffb0,
.mapbase = 0x00ffffb0,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 54,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
......@@ -1388,10 +1388,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0x00ffffb8,
.mapbase = 0x00ffffb8,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 58,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCI,
......@@ -1402,10 +1402,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0x00ffffc0,
.mapbase = 0x00ffffc0,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 62,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_SCI,
......@@ -1417,10 +1417,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0x00ffff78,
.mapbase = 0x00ffff78,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 90,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCI,
......@@ -1431,10 +1431,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0x00ffff80,
.mapbase = 0x00ffff80,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 94,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCI,
......@@ -1445,10 +1445,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = {
.port = {
.membase = (void *)0x00ffff88,
.mapbase = 0x00ffff88,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 98,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_SCI,
......
......@@ -669,7 +669,7 @@ static int sunsu_startup(struct uart_port *port)
* if it is, then bail out, because there's likely no UART
* here.
*/
if (!(up->port.flags & ASYNC_BUGGY_UART) &&
if (!(up->port.flags & UPF_BUGGY_UART) &&
(serial_inp(up, UART_LSR) == 0xff)) {
printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
return -ENODEV;
......@@ -707,7 +707,7 @@ static int sunsu_startup(struct uart_port *port)
up->ier = UART_IER_RLSI | UART_IER_RDI;
serial_outp(up, UART_IER, up->ier);
if (up->port.flags & ASYNC_FOURPORT) {
if (up->port.flags & UPF_FOURPORT) {
unsigned int icp;
/*
* Enable interrupts on the AST Fourport board
......@@ -740,7 +740,7 @@ static void sunsu_shutdown(struct uart_port *port)
serial_outp(up, UART_IER, 0);
spin_lock_irqsave(&up->port.lock, flags);
if (up->port.flags & ASYNC_FOURPORT) {
if (up->port.flags & UPF_FOURPORT) {
/* reset interrupts on the AST Fourport board */
inb((up->port.iobase & 0xfe0) | 0x1f);
up->port.mctrl |= TIOCM_OUT1;
......@@ -1132,7 +1132,7 @@ ebus_done:
spin_lock_irqsave(&up->port.lock, flags);
if (!(up->port.flags & ASYNC_BUGGY_UART)) {
if (!(up->port.flags & UPF_BUGGY_UART)) {
/*
* Do a simple existence test first; if we fail this, there's
* no point trying anything else.
......@@ -1170,7 +1170,7 @@ ebus_done:
* manufacturer would be stupid enough to design a board
* that conflicts with COM 1-4 --- we hope!
*/
if (!(up->port.flags & ASYNC_SKIP_TEST)) {
if (!(up->port.flags & UPF_SKIP_TEST)) {
serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
status1 = serial_inp(up, UART_MSR) & 0xF0;
serial_outp(up, UART_MCR, save_mcr);
......@@ -1371,7 +1371,7 @@ static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
/* Wait up to 1s for flow control if necessary */
if (up->port.flags & ASYNC_CONS_FLOW) {
if (up->port.flags & UPF_CONS_FLOW) {
tmout = 1000000;
while (--tmout &&
((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
......@@ -1513,7 +1513,7 @@ static int __init sunsu_serial_init(void)
up->su_type == SU_PORT_KBD)
continue;
up->port.flags |= ASYNC_BOOT_AUTOCONF;
up->port.flags |= UPF_BOOT_AUTOCONF;
up->port.type = PORT_UNKNOWN;
up->port.uartclk = (SU_BASE_BAUD * 16);
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment