Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
X
xcap-capability-linux
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Deploy
Releases
Model registry
Monitor
Incidents
Service Desk
Analyze
Value stream analytics
Contributor analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
xcap
xcap-capability-linux
Commits
b0b0e13e
Commit
b0b0e13e
authored
18 years ago
by
Ralf Baechle
Browse files
Options
Downloads
Patches
Plain Diff
[MIPS] Remove unused instances of prom_build_cpu_map.
Signed-off-by:
Ralf Baechle
<
ralf@linux-mips.org
>
parent
c583122c
No related branches found
No related tags found
No related merge requests found
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
arch/mips/mips-boards/malta/malta_smp.c
+0
-19
0 additions, 19 deletions
arch/mips/mips-boards/malta/malta_smp.c
arch/mips/mips-boards/sim/sim_smp.c
+0
-21
0 additions, 21 deletions
arch/mips/mips-boards/sim/sim_smp.c
with
0 additions
and
40 deletions
arch/mips/mips-boards/malta/malta_smp.c
+
0
−
19
View file @
b0b0e13e
...
@@ -33,25 +33,6 @@ void core_send_ipi(int cpu, unsigned int action)
...
@@ -33,25 +33,6 @@ void core_send_ipi(int cpu, unsigned int action)
#endif
/* CONFIG_MIPS_MT_SMTC */
#endif
/* CONFIG_MIPS_MT_SMTC */
}
}
/*
* Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
*/
void
__init
prom_build_cpu_map
(
void
)
{
int
nextslot
;
/*
* As of November, 2004, MIPSsim only simulates one core
* at a time. However, that core may be a MIPS MT core
* with multiple virtual processors and thread contexts.
*/
if
(
read_c0_config3
()
&
(
1
<<
2
))
{
nextslot
=
mipsmt_build_cpu_map
(
1
);
}
}
/*
/*
* Platform "CPU" startup hook
* Platform "CPU" startup hook
*/
*/
...
...
This diff is collapsed.
Click to expand it.
arch/mips/mips-boards/sim/sim_smp.c
+
0
−
21
View file @
b0b0e13e
...
@@ -50,27 +50,6 @@ void core_send_ipi(int cpu, unsigned int action)
...
@@ -50,27 +50,6 @@ void core_send_ipi(int cpu, unsigned int action)
}
}
/*
* Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
*/
void
__init
prom_build_cpu_map
(
void
)
{
#ifdef CONFIG_MIPS_MT_SMTC
int
nextslot
;
/*
* As of November, 2004, MIPSsim only simulates one core
* at a time. However, that core may be a MIPS MT core
* with multiple virtual processors and thread contexts.
*/
if
(
read_c0_config3
()
&
(
1
<<
2
))
{
nextslot
=
mipsmt_build_cpu_map
(
1
);
}
#endif
/* CONFIG_MIPS_MT_SMTC */
}
/*
/*
* Platform "CPU" startup hook
* Platform "CPU" startup hook
*/
*/
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment