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Commit 96983ffe authored by Kevin Cernekee's avatar Kevin Cernekee Committed by Ralf Baechle
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MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines. 


This extends commit a8ca8b64 to cover
MIPSxx-style board cache code.

Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent a648e811
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