Commit 19449bfc authored by Committed by David S. Miller
stmmac: enable/disable rx/tx in the core with a single write.
This patch enables and disables the rx and tx bits in the MAC control reg by using a single write operation. This also solves a possible problem (spotted on SPEAr platforms) at 10Mbps where two consecutive writes to a MAC control register can take more than 4 phy_clk cycles. Signed-off-by: Armando Visconti <email@example.com> Acked-by: Giuseppe Cavallaro <firstname.lastname@example.org> Signed-off-by: David S. Miller <email@example.com>
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