Commit 191d6a8c authored by Pavel Roskin's avatar Pavel Roskin Committed by John W. Linville
Browse files

b43legacy: remove 64-bit DMA support



Devices supported by b43legacy don't support 64-bit DMA.
Signed-off-by: default avatarPavel Roskin <proski@gnu.org>
Acked-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent ae7f9a74
This diff is collapsed.
......@@ -82,90 +82,6 @@ struct b43legacy_dmadesc32 {
#define B43legacy_DMA32_DCTL_FRAMESTART 0x80000000
/*** 64-bit DMA Engine. ***/
/* 64-bit DMA controller registers. */
#define B43legacy_DMA64_TXCTL 0x00
#define B43legacy_DMA64_TXENABLE 0x00000001
#define B43legacy_DMA64_TXSUSPEND 0x00000002
#define B43legacy_DMA64_TXLOOPBACK 0x00000004
#define B43legacy_DMA64_TXFLUSH 0x00000010
#define B43legacy_DMA64_TXADDREXT_MASK 0x00030000
#define B43legacy_DMA64_TXADDREXT_SHIFT 16
#define B43legacy_DMA64_TXINDEX 0x04
#define B43legacy_DMA64_TXRINGLO 0x08
#define B43legacy_DMA64_TXRINGHI 0x0C
#define B43legacy_DMA64_TXSTATUS 0x10
#define B43legacy_DMA64_TXSTATDPTR 0x00001FFF
#define B43legacy_DMA64_TXSTAT 0xF0000000
#define B43legacy_DMA64_TXSTAT_DISABLED 0x00000000
#define B43legacy_DMA64_TXSTAT_ACTIVE 0x10000000
#define B43legacy_DMA64_TXSTAT_IDLEWAIT 0x20000000
#define B43legacy_DMA64_TXSTAT_STOPPED 0x30000000
#define B43legacy_DMA64_TXSTAT_SUSP 0x40000000
#define B43legacy_DMA64_TXERROR 0x14
#define B43legacy_DMA64_TXERRDPTR 0x0001FFFF
#define B43legacy_DMA64_TXERR 0xF0000000
#define B43legacy_DMA64_TXERR_NOERR 0x00000000
#define B43legacy_DMA64_TXERR_PROT 0x10000000
#define B43legacy_DMA64_TXERR_UNDERRUN 0x20000000
#define B43legacy_DMA64_TXERR_TRANSFER 0x30000000
#define B43legacy_DMA64_TXERR_DESCREAD 0x40000000
#define B43legacy_DMA64_TXERR_CORE 0x50000000
#define B43legacy_DMA64_RXCTL 0x20
#define B43legacy_DMA64_RXENABLE 0x00000001
#define B43legacy_DMA64_RXFROFF_MASK 0x000000FE
#define B43legacy_DMA64_RXFROFF_SHIFT 1
#define B43legacy_DMA64_RXDIRECTFIFO 0x00000100
#define B43legacy_DMA64_RXADDREXT_MASK 0x00030000
#define B43legacy_DMA64_RXADDREXT_SHIFT 16
#define B43legacy_DMA64_RXINDEX 0x24
#define B43legacy_DMA64_RXRINGLO 0x28
#define B43legacy_DMA64_RXRINGHI 0x2C
#define B43legacy_DMA64_RXSTATUS 0x30
#define B43legacy_DMA64_RXSTATDPTR 0x00001FFF
#define B43legacy_DMA64_RXSTAT 0xF0000000
#define B43legacy_DMA64_RXSTAT_DISABLED 0x00000000
#define B43legacy_DMA64_RXSTAT_ACTIVE 0x10000000
#define B43legacy_DMA64_RXSTAT_IDLEWAIT 0x20000000
#define B43legacy_DMA64_RXSTAT_STOPPED 0x30000000
#define B43legacy_DMA64_RXSTAT_SUSP 0x40000000
#define B43legacy_DMA64_RXERROR 0x34
#define B43legacy_DMA64_RXERRDPTR 0x0001FFFF
#define B43legacy_DMA64_RXERR 0xF0000000
#define B43legacy_DMA64_RXERR_NOERR 0x00000000
#define B43legacy_DMA64_RXERR_PROT 0x10000000
#define B43legacy_DMA64_RXERR_UNDERRUN 0x20000000
#define B43legacy_DMA64_RXERR_TRANSFER 0x30000000
#define B43legacy_DMA64_RXERR_DESCREAD 0x40000000
#define B43legacy_DMA64_RXERR_CORE 0x50000000
/* 64-bit DMA descriptor. */
struct b43legacy_dmadesc64 {
__le32 control0;
__le32 control1;
__le32 address_low;
__le32 address_high;
} __packed;
#define B43legacy_DMA64_DCTL0_DTABLEEND 0x10000000
#define B43legacy_DMA64_DCTL0_IRQ 0x20000000
#define B43legacy_DMA64_DCTL0_FRAMEEND 0x40000000
#define B43legacy_DMA64_DCTL0_FRAMESTART 0x80000000
#define B43legacy_DMA64_DCTL1_BYTECNT 0x00001FFF
#define B43legacy_DMA64_DCTL1_ADDREXT_MASK 0x00030000
#define B43legacy_DMA64_DCTL1_ADDREXT_SHIFT 16
struct b43legacy_dmadesc_generic {
union {
struct b43legacy_dmadesc32 dma32;
struct b43legacy_dmadesc64 dma64;
} __packed;
} __packed;
/* Misc DMA constants */
#define B43legacy_DMA_RINGMEMSIZE PAGE_SIZE
#define B43legacy_DMA0_RX_FRAMEOFFSET 30
......@@ -197,35 +113,12 @@ struct b43legacy_dmadesc_meta {
bool is_last_fragment;
};
struct b43legacy_dmaring;
/* Lowlevel DMA operations that differ between 32bit and 64bit DMA. */
struct b43legacy_dma_ops {
struct b43legacy_dmadesc_generic * (*idx2desc)
(struct b43legacy_dmaring *ring,
int slot,
struct b43legacy_dmadesc_meta
**meta);
void (*fill_descriptor)(struct b43legacy_dmaring *ring,
struct b43legacy_dmadesc_generic *desc,
dma_addr_t dmaaddr, u16 bufsize,
int start, int end, int irq);
void (*poke_tx)(struct b43legacy_dmaring *ring, int slot);
void (*tx_suspend)(struct b43legacy_dmaring *ring);
void (*tx_resume)(struct b43legacy_dmaring *ring);
int (*get_current_rxslot)(struct b43legacy_dmaring *ring);
void (*set_current_rxslot)(struct b43legacy_dmaring *ring, int slot);
};
enum b43legacy_dmatype {
B43legacy_DMA_30BIT = 30,
B43legacy_DMA_32BIT = 32,
B43legacy_DMA_64BIT = 64,
};
struct b43legacy_dmaring {
/* Lowlevel DMA ops. */
const struct b43legacy_dma_ops *ops;
/* Kernel virtual base address of the ring memory. */
void *descbase;
/* Meta data about all descriptors. */
......
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