Received frames must be re-clocked by the local XGXS to the 156.25 MHz
(DDR) clock of the XGMII.  If the remote clock is slightly faster this
can reduce a minimum IPG of 64 bit-times (1 cycle) to 32 bit-times
(half a cycle).  If the XMAC detects that a frame has reached the
maximum RX frame length in the same cycle that it receives one of
these reduced IPGs, it may miss the IPG, causing two valid frames to
be treated as a single invalid frame (over-length with bad CRC).

We work around this by increasing the maximum RX frame length so that
peers with matched MTU will not provoke this bug.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>