Charlie Jacobsen authored Jun 17, 2014 and Vikram Narayanan committed Oct 25, 2016

Address space layout includes tss, gdt, ipc registers, and small
stack. See lcd-domains-arch.h.
-- a tss may be required (not sure) while running in non-root,
   even though a stack switch does not occur
-- a gdt may also be required (even though all info is written in
   the hidden part of the segment registers); again, not sure

4 KBs is reserved for an IDT if it is needed (not mapped or
allocated).

GDT layout given in lcd-domains-arch.h. (GDT build code to
be implemented / copied over next.)

LDT is not used (so no need to load access rights, etc.). It
is marked as unusable.

Fixed segment register limit fields. These must be 32 bits and
are always byte granularity. The granularity field in the
access rights bits is confusing (see Intel SDM V3 26.3.1.2).