• Atsushi Nemoto's avatar
    [MIPS] Define MIPS_CPU_IRQ_BASE in generic header · 97dcb82d
    Atsushi Nemoto authored
    The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
    platforms and are same value on most platforms (0 or 16, depends on
    CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
    them customizable.  This will save a few cycle on each CPU interrupt.
    A good side effect is removing some dependencies to MALTA in generic
    SMTC code.
    Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
    mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
    them might cause some header dependency problem and there seems no
    good reason to customize it.  So currently only VR41XX is using custom
    MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
    Testing this patch on those platforms is greatly appreciated.  Thank
    Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
    Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
irq.c 2.88 KB