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    [ARM] OMAP2 SDRC: add SDRAM timing parameter infrastructure · 87246b75
    Paul Walmsley authored
    
    
    For a given SDRAM clock rate, SDRAM chips require memory controllers
    to use a specific set of timing minimums and maximums to transfer data
    reliably.  These parameters can be different for different memory chips
    and can also potentially vary by board.
    
    This patch adds the infrastructure for board-*.c files to pass this
    timing data to the SDRAM controller init function.  The timing data is
    specified in an 'omap_sdrc_params' structure, in terms of SDRC
    controller register values.  An array of these structs, one per SDRC
    target clock rate, is passed by the board-*.c file to
    omap2_init_common_hw().
    
    This patch does not define the values for different memory chips, nor
    does it use the values for anything; those will come in subsequent patches.
    
    linux-omap source commit is bc84ecfc795c2d1c5cda8da4127cf972f488a696.
    
    Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
    Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    87246b75