• David Daney's avatar
    MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors. · 82622284
    David Daney authored
    Processors that support the mips64r2 ISA can in four instructions
    convert a shifted PGD pointer stored in the upper bits of c0_context
    into a usable pointer.  By doing this we save a memory load and
    associated potential cache miss in the TLB exception handlers.
    Since the upper bits of c0_context were holding the CPU number, we
    move this to the upper bits of c0_xcontext which doesn't have enough
    bits to hold the PGD pointer, but has plenty for the CPU number.
    Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
    Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
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