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    OMAPDSS: fix shared irq handlers · 0925afc9
    Tomi Valkeinen authored
    
    
    DSS uses shared irq handlers for DISPC and DSI, because on OMAP3, the
    DISPC and DSI share the same irq line.
    
    However, the irq handlers presume that the hardware is enabled, which,
    in theory, may not be the case with shared irq handlers. So if an
    interrupt happens while the DISPC/DSI is off, the kernel will halt as
    the irq handler tries to access the DISPC/DSI registers.
    
    In practice that should never happen, as both DSI and DISPC are in the
    same power domain. So if there's an IRQ for one of them, the other is
    also enabled. However, if CONFIG_DEBUG_SHIRQ is enabled, the kernel will
    generate a spurious IRQ, which then causes the problem.
    
    This patch adds an is_enabled field for both DISPC and DSI, which is
    used to track if the HW is enabled. For DISPC the code is slightly more
    complex, as the users of DISPC can register the interrupt handler, and
    we want to hide the is_enabled handling from the users of DISPC.
    
    Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
    0925afc9