• Shannon Zhao's avatar
    arm64: KVM: Add access handler for PMUSERENR register · d692b8ad
    Shannon Zhao authored
    This register resets as unknown in 64bit mode while it resets as zero
    in 32bit mode. Here we choose to reset it as zero for consistency.
    PMUSERENR_EL0 holds some bits which decide whether PMU registers can be
    accessed from EL0. Add some check helpers to handle the access from EL0.
    When these bits are zero, only reading PMUSERENR will trap to EL2 and
    writing PMUSERENR or reading/writing other PMU registers will trap to
    EL1 other than EL2 when HCR.TGE==0. To current KVM configuration
    (HCR.TGE==0) there is no way to get these traps. Here we write 0xf to
    physical PMUSERENR register on VM entry, so that it will trap PMU access
    from EL0 to EL2. Within the register access handler we check the real
    value of guest PMUSERENR register to decide whether this access is
    allowed. If not allowed, return false to inject UND to guest.
    Signed-off-by: default avatarShannon Zhao <shannon.zhao@linaro.org>
    Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
kvm_perf_event.h 2.4 KB