• Milton Miller's avatar
    kbuild: call make once for all targets when O=.. is used · 0b35786d
    Milton Miller authored
    Change the invocations of make in the output directory Makefile and the
    main Makefile for separate object trees to pass all goals to one $(MAKE)
    via a new phony target "sub-make" and the existing target _all.
    When compiling with separate object directories, a separate make is called
    in the context of another directory (from the output directory the main
    Makefile is called, the Makefile is then restarted with current directory
    set to the object tree).  Before this patch, when multiple make command
    goals are specified, each target results in a separate make invocation.
    With make -j, these invocations may run in parallel, resulting in multiple
    commands running in the same directory clobbering each others results.
    I did not try to address make -j for mixed dot-config and no-dot-config
    targets.  Because the order does matter, a solution was not obvious.
    Perhaps a simple check for MAKEFLAGS having -j and refusing to run would
    be appropriate.
    Signed-off-by: default avatarMilton Miller <miltonm@bga.com>
    Signed-off-by: default avatarSam Ravnborg <sam@ravnborg.org>
Makefile 50.7 KB