• Russell King's avatar
    ARM: SMP enable of cache maintanence broadcast · 0fc03d4c
    Russell King authored
    
    
    Masahiro Yamada reports that we can fail to set the FW bit in the
    auxiliary control register, which enables broadcasting the cache
    maintanence operations.  This occurs because we only check that the
    SMP/nAMP bit is set, rather than checking whether all the bits we
    want to be set are set.
    
    Rearrange the code to ensure that all desired bits are set, and only
    update the register if we discover some required bits are not set.
    Tested-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
    0fc03d4c
proc-v7.S 19.4 KB