Commit c227f099 authored by Anthony Liguori's avatar Anthony Liguori

Revert "Get rid of _t suffix"

In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem.  Something
like this _must_ be presented on the list first so people can provide input
and cope with it.

This reverts commit 99a0949b.
Signed-off-by: default avatarAnthony Liguori <>
parent 99a0949b
......@@ -40,10 +40,14 @@ Rationale:
3. Naming
Variables are lower_case_with_underscores; easy to type and read.
Structured type names are in CamelCase; harder to type but standing
out. Scalar type names are a_lower_case_beginning_with_an a or an.
Do not use _t suffix if you are including any headers.
Variables are lower_case_with_underscores; easy to type and read. Structured
type names are in CamelCase; harder to type but standing out. Scalar type
names are lower_case_with_underscores_ending_with_a_t, like the POSIX
uint64_t and family. Note that this last convention contradicts POSIX
and is therefore likely to be changed.
Typedefs are used to eliminate the redundant 'struct' keyword. It is the
QEMU coding style.
4. Block structure
......@@ -16,12 +16,12 @@
#include "cpu-defs.h"
typedef a_ram_addr (QEMUBalloonEvent)(void *opaque, a_ram_addr target);
typedef ram_addr_t (QEMUBalloonEvent)(void *opaque, ram_addr_t target);
void qemu_add_balloon_handler(QEMUBalloonEvent *func, void *opaque);
void qemu_balloon(a_ram_addr target);
void qemu_balloon(ram_addr_t target);
a_ram_addr qemu_balloon_status(void);
ram_addr_t qemu_balloon_status(void);
This diff is collapsed.
......@@ -110,12 +110,12 @@ typedef enum {
} e_console_type;
} console_type_t;
/* ??? This is mis-named.
It is used for both text and graphical consoles. */
struct TextConsole {
e_console_type console_type;
console_type_t console_type;
DisplayState *ds;
/* Graphic console state. */
vga_hw_update_ptr hw_update;
......@@ -183,7 +183,7 @@ void vga_hw_screen_dump(const char *filename)
active_console = previous_active_console;
void vga_hw_text_update(a_console_ch *chardata)
void vga_hw_text_update(console_ch_t *chardata)
if (active_console && active_console->hw_text_update)
active_console->hw_text_update(active_console->hw, chardata);
......@@ -1197,7 +1197,7 @@ static void text_console_invalidate(void *opaque)
static void text_console_update(void *opaque, a_console_ch *chardata)
static void text_console_update(void *opaque, console_ch_t *chardata)
TextConsole *s = (TextConsole *) opaque;
int i, j, src;
......@@ -1236,7 +1236,7 @@ static TextConsole *get_graphic_console(DisplayState *ds)
return NULL;
static TextConsole *new_console(DisplayState *ds, e_console_type console_type)
static TextConsole *new_console(DisplayState *ds, console_type_t console_type)
TextConsole *s;
int i;
......@@ -279,8 +279,8 @@ static inline int ds_get_bytes_per_pixel(DisplayState *ds)
return ds->surface->pf.bytes_per_pixel;
typedef unsigned long a_console_ch;
static inline void console_write_ch(a_console_ch *dest, uint32_t ch)
typedef unsigned long console_ch_t;
static inline void console_write_ch(console_ch_t *dest, uint32_t ch)
cpu_to_le32wu((uint32_t *) dest, ch);
......@@ -288,7 +288,7 @@ static inline void console_write_ch(a_console_ch *dest, uint32_t ch)
typedef void (*vga_hw_update_ptr)(void *);
typedef void (*vga_hw_invalidate_ptr)(void *);
typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
typedef void (*vga_hw_text_update_ptr)(void *, a_console_ch *);
typedef void (*vga_hw_text_update_ptr)(void *, console_ch_t *);
DisplayState *graphic_console_init(vga_hw_update_ptr update,
vga_hw_invalidate_ptr invalidate,
......@@ -299,7 +299,7 @@ DisplayState *graphic_console_init(vga_hw_update_ptr update,
void vga_hw_update(void);
void vga_hw_invalidate(void);
void vga_hw_screen_dump(const char *filename);
void vga_hw_text_update(a_console_ch *chardata);
void vga_hw_text_update(console_ch_t *chardata);
int is_graphic_console(void);
int is_fixedsize_console(void);
......@@ -814,7 +814,7 @@ void cpu_reset(CPUState *s);
/* Return the physical page corresponding to a virtual one. Use it
only for debugging because no protection checks are done. Return -1
if no page found. */
a_target_phys_addr cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
#define CPU_LOG_TB_OUT_ASM (1 << 0)
#define CPU_LOG_TB_IN_ASM (1 << 1)
......@@ -847,8 +847,8 @@ int cpu_str_to_log_mask(const char *str);
extern int phys_ram_fd;
extern uint8_t *phys_ram_dirty;
extern a_ram_addr ram_size;
extern a_ram_addr last_ram_offset;
extern ram_addr_t ram_size;
extern ram_addr_t last_ram_offset;
/* physical memory access */
......@@ -876,23 +876,23 @@ int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
/* read dirty bit (return 0 or 1) */
static inline int cpu_physical_memory_is_dirty(a_ram_addr addr)
static inline int cpu_physical_memory_is_dirty(ram_addr_t addr)
return phys_ram_dirty[addr >> TARGET_PAGE_BITS] == 0xff;
static inline int cpu_physical_memory_get_dirty(a_ram_addr addr,
static inline int cpu_physical_memory_get_dirty(ram_addr_t addr,
int dirty_flags)
return phys_ram_dirty[addr >> TARGET_PAGE_BITS] & dirty_flags;
static inline void cpu_physical_memory_set_dirty(a_ram_addr addr)
static inline void cpu_physical_memory_set_dirty(ram_addr_t addr)
phys_ram_dirty[addr >> TARGET_PAGE_BITS] = 0xff;
void cpu_physical_memory_reset_dirty(a_ram_addr start, a_ram_addr end,
void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
int dirty_flags);
void cpu_tlb_update_dirty(CPUState *env);
......@@ -900,8 +900,8 @@ int cpu_physical_memory_set_dirty_tracking(int enable);
int cpu_physical_memory_get_dirty_tracking(void);
int cpu_physical_sync_dirty_bitmap(a_target_phys_addr start_addr,
a_target_phys_addr end_addr);
int cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr,
target_phys_addr_t end_addr);
void dump_exec_info(FILE *f,
int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
......@@ -911,9 +911,9 @@ void dump_exec_info(FILE *f,
* batching which can make a major impact on performance when using
* virtualization.
void qemu_register_coalesced_mmio(a_target_phys_addr addr, a_ram_addr size);
void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
void qemu_unregister_coalesced_mmio(a_target_phys_addr addr, a_ram_addr size);
void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
/* host CPU ticks (if available) */
......@@ -10,69 +10,69 @@
#include "bswap.h"
/* address in the RAM (different from a physical address) */
typedef unsigned long a_ram_addr;
typedef unsigned long ram_addr_t;
/* memory API */
typedef void CPUWriteMemoryFunc(void *opaque, a_target_phys_addr addr, uint32_t value);
typedef uint32_t CPUReadMemoryFunc(void *opaque, a_target_phys_addr addr);
typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
void cpu_register_physical_memory_offset(a_target_phys_addr start_addr,
a_ram_addr size,
a_ram_addr phys_offset,
a_ram_addr region_offset);
static inline void cpu_register_physical_memory(a_target_phys_addr start_addr,
a_ram_addr size,
a_ram_addr phys_offset)
void cpu_register_physical_memory_offset(target_phys_addr_t start_addr,
ram_addr_t size,
ram_addr_t phys_offset,
ram_addr_t region_offset);
static inline void cpu_register_physical_memory(target_phys_addr_t start_addr,
ram_addr_t size,
ram_addr_t phys_offset)
cpu_register_physical_memory_offset(start_addr, size, phys_offset, 0);
a_ram_addr cpu_get_physical_page_desc(a_target_phys_addr addr);
a_ram_addr qemu_ram_alloc(a_ram_addr);
void qemu_ram_free(a_ram_addr addr);
ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);
ram_addr_t qemu_ram_alloc(ram_addr_t);
void qemu_ram_free(ram_addr_t addr);
/* This should only be used for ram local to a device. */
void *qemu_get_ram_ptr(a_ram_addr addr);
void *qemu_get_ram_ptr(ram_addr_t addr);
/* This should not be used by devices. */
a_ram_addr qemu_ram_addr_from_host(void *ptr);
ram_addr_t qemu_ram_addr_from_host(void *ptr);
int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
CPUWriteMemoryFunc * const *mem_write,
void *opaque);
void cpu_unregister_io_memory(int table_address);
void cpu_physical_memory_rw(a_target_phys_addr addr, uint8_t *buf,
void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
int len, int is_write);
static inline void cpu_physical_memory_read(a_target_phys_addr addr,
static inline void cpu_physical_memory_read(target_phys_addr_t addr,
uint8_t *buf, int len)
cpu_physical_memory_rw(addr, buf, len, 0);
static inline void cpu_physical_memory_write(a_target_phys_addr addr,
static inline void cpu_physical_memory_write(target_phys_addr_t addr,
const uint8_t *buf, int len)
cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1);
void *cpu_physical_memory_map(a_target_phys_addr addr,
a_target_phys_addr *plen,
void *cpu_physical_memory_map(target_phys_addr_t addr,
target_phys_addr_t *plen,
int is_write);
void cpu_physical_memory_unmap(void *buffer, a_target_phys_addr len,
int is_write, a_target_phys_addr access_len);
void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
int is_write, target_phys_addr_t access_len);
void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
void cpu_unregister_map_client(void *cookie);
uint32_t ldub_phys(a_target_phys_addr addr);
uint32_t lduw_phys(a_target_phys_addr addr);
uint32_t ldl_phys(a_target_phys_addr addr);
uint64_t ldq_phys(a_target_phys_addr addr);
void stl_phys_notdirty(a_target_phys_addr addr, uint32_t val);
void stq_phys_notdirty(a_target_phys_addr addr, uint64_t val);
void stb_phys(a_target_phys_addr addr, uint32_t val);
void stw_phys(a_target_phys_addr addr, uint32_t val);
void stl_phys(a_target_phys_addr addr, uint32_t val);
void stq_phys(a_target_phys_addr addr, uint64_t val);
void cpu_physical_memory_write_rom(a_target_phys_addr addr,
uint32_t ldub_phys(target_phys_addr_t addr);
uint32_t lduw_phys(target_phys_addr_t addr);
uint32_t ldl_phys(target_phys_addr_t addr);
uint64_t ldq_phys(target_phys_addr_t addr);
void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
void stb_phys(target_phys_addr_t addr, uint32_t val);
void stw_phys(target_phys_addr_t addr, uint32_t val);
void stl_phys(target_phys_addr_t addr, uint32_t val);
void stq_phys(target_phys_addr_t addr, uint64_t val);
void cpu_physical_memory_write_rom(target_phys_addr_t addr,
const uint8_t *buf, int len);
#define IO_MEM_SHIFT 3
......@@ -95,15 +95,15 @@ typedef struct CPUTLBEntry {
use the corresponding iotlb value. */
/* on i386 Linux make sure it is aligned */
a_target_phys_addr addend __attribute__((aligned(8)));
target_phys_addr_t addend __attribute__((aligned(8)));
a_target_phys_addr addend;
target_phys_addr_t addend;
/* padding to get a power of two size */
uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
(sizeof(target_ulong) * 3 +
((-sizeof(target_ulong) * 3) & (sizeof(a_target_phys_addr) - 1)) +
((-sizeof(target_ulong) * 3) & (sizeof(target_phys_addr_t) - 1)) +
} CPUTLBEntry;
......@@ -152,7 +152,7 @@ typedef struct CPUWatchpoint {
volatile sig_atomic_t exit_request; \
/* The meaning of the MMU modes is defined in the target code. */ \
a_target_phys_addr iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
/* buffer for temporaries in the code generator */ \
long temp_buf[CPU_TEMP_BUF_NLONGS]; \
......@@ -40,7 +40,7 @@
#define FONT_HEIGHT 16
#define FONT_WIDTH 8
static a_console_ch screen[160 * 100];
static console_ch_t screen[160 * 100];
static WINDOW *screenpad = NULL;
static int width, height, gwidth, gheight, invalidate;
static int px, py, sminx, sminy, smaxx, smaxy;
......@@ -158,7 +158,7 @@ static void curses_cursor_position(DisplayState *ds, int x, int y)
#include "curses_keys.h"
static a_kbd_layout *kbd_layout = NULL;
static kbd_layout_t *kbd_layout = NULL;
static int keycode2keysym[CURSES_KEYS];
static void curses_refresh(DisplayState *ds)
......@@ -243,7 +243,7 @@ static const int curses2keysym[CURSES_KEYS] = {
static const a_name2keysym name2keysym[] = {
static const name2keysym_t name2keysym[] = {
/* Plain ASCII */
{ "space", 0x020 },
{ "exclam", 0x021 },
......@@ -109,7 +109,7 @@ static struct commpage_entry commpage_entries[] =
COMMPAGE_ENTRY(add_atomic_word64, 0, 0x1c0, unimpl_commpage, CALL_INDIRECT | HAS_PTR),
COMMPAGE_ENTRY(mach_absolute_time, 0, 0x200, unimpl_commpage, CALL_INDIRECT),
COMMPAGE_ENTRY(a_spinlockry, 1, 0x220, unimpl_commpage, CALL_INDIRECT),
COMMPAGE_ENTRY(spinlock_try, 1, 0x220, unimpl_commpage, CALL_INDIRECT),
COMMPAGE_ENTRY(spinlock_lock, 1, 0x260, OSSpinLockLock, CALL_DIRECT),
COMMPAGE_ENTRY(spinlock_unlock, 1, 0x2a0, OSSpinLockUnlock, CALL_DIRECT),
COMMPAGE_ENTRY(pthread_getspecific, 0, 0x2c0, unimpl_commpage, CALL_INDIRECT),
......@@ -101,7 +101,7 @@ typedef struct mach_i386_thread_state {
unsigned int es;
unsigned int fs;
unsigned int gs;
} mach_i386_thread_state_t;
void bswap_i386_thread_state(struct mach_i386_thread_state *ts)
......@@ -10,7 +10,7 @@
#include "gdbstub.h"
typedef siginfo_t a_target_siginfo;
typedef siginfo_t target_siginfo_t;
#define target_sigaction sigaction
#ifdef TARGET_I386
struct target_pt_regs {
......@@ -22,7 +22,7 @@ struct syminfo;
struct elf32_sym;
struct elf64_sym;
typedef const char *(*lookup_symbol_t)(struct syminfo *s, a_target_phys_addr orig_addr);
typedef const char *(*lookup_symbol_t)(struct syminfo *s, target_phys_addr_t orig_addr);
struct syminfo {
lookup_symbol_t lookup_symbol;
......@@ -18,8 +18,8 @@ void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint)
qsg->size = 0;
void qemu_sglist_add(QEMUSGList *qsg, a_target_phys_addr base,
a_target_phys_addr len)
void qemu_sglist_add(QEMUSGList *qsg, target_phys_addr_t base,
target_phys_addr_t len)
if (qsg->nsg == qsg->nalloc) {
qsg->nalloc = 2 * qsg->nalloc + 1;
......@@ -44,7 +44,7 @@ typedef struct {
uint64_t sector_num;
int is_write;
int sg_cur_index;
a_target_phys_addr sg_cur_byte;
target_phys_addr_t sg_cur_byte;
QEMUIOVector iov;
......@@ -82,7 +82,7 @@ static void dma_bdrv_unmap(DMAAIOCB *dbs)
static void dma_bdrv_cb(void *opaque, int ret)
DMAAIOCB *dbs = (DMAAIOCB *)opaque;
a_target_phys_addr cur_addr, cur_len;
target_phys_addr_t cur_addr, cur_len;
void *mem;
dbs->acb = NULL;
......@@ -16,20 +16,20 @@
#include "block.h"
typedef struct {
a_target_phys_addr base;
a_target_phys_addr len;
target_phys_addr_t base;
target_phys_addr_t len;
} ScatterGatherEntry;
typedef struct {
ScatterGatherEntry *sg;
int nsg;
int nalloc;
a_target_phys_addr size;
target_phys_addr_t size;
void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint);
void qemu_sglist_add(QEMUSGList *qsg, a_target_phys_addr base,
a_target_phys_addr len);
void qemu_sglist_add(QEMUSGList *qsg, target_phys_addr_t base,
target_phys_addr_t len);
void qemu_sglist_destroy(QEMUSGList *qsg);
BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs,
......@@ -37,7 +37,7 @@
/* XXX: This may be wrong for 64-bit ILP32 hosts. */
typedef void * a_host_reg;
typedef void * host_reg_t;
typedef struct __sFILE FILE;
......@@ -81,16 +81,16 @@ TranslationBlock *tb_gen_code(CPUState *env,
void cpu_exec_init(CPUState *env);
void QEMU_NORETURN cpu_loop_exit(void);
int page_unprotect(target_ulong address, unsigned long pc, void *puc);
void tb_invalidate_phys_page_range(a_target_phys_addr start, a_target_phys_addr end,
void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end,
int is_cpu_write_access);
void tb_invalidate_page_range(target_ulong start, target_ulong end);
void tlb_flush_page(CPUState *env, target_ulong addr);
void tlb_flush(CPUState *env, int flush_global);
int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
a_target_phys_addr paddr, int prot,
target_phys_addr_t paddr, int prot,
int mmu_idx, int is_softmmu);
static inline int tlb_set_page(CPUState *env1, target_ulong vaddr,
a_target_phys_addr paddr, int prot,
target_phys_addr_t paddr, int prot,
int mmu_idx, int is_softmmu)
if (prot & PAGE_READ)
......@@ -269,7 +269,7 @@ extern void *io_mem_opaque[IO_MEM_NB_ENTRIES];
#include "qemu-lock.h"
extern a_spinlock tb_lock;
extern spinlock_t tb_lock;
extern int tb_invalidated_flag;
This diff is collapsed.
......@@ -27,8 +27,8 @@
#if defined(DECLARE_HOST_REGS)
#define DO_REG(REG) \
register a_host_reg reg_AREG##REG asm(AREG##REG); \
volatile a_host_reg saved_AREG##REG;
register host_reg_t reg_AREG##REG asm(AREG##REG); \
volatile host_reg_t saved_AREG##REG;
#elif defined(SAVE_HOST_REGS)
......@@ -29,7 +29,7 @@ void irq_info(Monitor *mon)
/* Board init. */
static void an5206_init(a_ram_addr ram_size,
static void an5206_init(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
......@@ -37,7 +37,7 @@ static void an5206_init(a_ram_addr ram_size,
CPUState *env;
int kernel_size;
uint64_t elf_entry;
a_target_phys_addr entry;
target_phys_addr_t entry;
if (!cpu_model)
cpu_model = "m5206";
......@@ -39,7 +39,7 @@ do { printf("APB: " fmt , ## __VA_ARGS__); } while (0)
#define APB_DPRINTF(fmt, ...)
typedef a_target_phys_addr a_pci_addr;
typedef target_phys_addr_t pci_addr_t;
#include "pci_host.h"
typedef struct APBState {
......@@ -47,7 +47,7 @@ typedef struct APBState {
PCIHostState host_state;
} APBState;
static void pci_apb_config_writel (void *opaque, a_target_phys_addr addr,
static void pci_apb_config_writel (void *opaque, target_phys_addr_t addr,
uint32_t val)
APBState *s = opaque;
......@@ -61,7 +61,7 @@ static void pci_apb_config_writel (void *opaque, a_target_phys_addr addr,
static uint32_t pci_apb_config_readl (void *opaque,
a_target_phys_addr addr)
target_phys_addr_t addr)
APBState *s = opaque;
uint32_t val;
......@@ -87,7 +87,7 @@ static CPUReadMemoryFunc * const pci_apb_config_read[] = {
static void apb_config_writel (void *opaque, a_target_phys_addr addr,
static void apb_config_writel (void *opaque, target_phys_addr_t addr,
uint32_t val)
//PCIBus *s = opaque;
......@@ -105,7 +105,7 @@ static void apb_config_writel (void *opaque, a_target_phys_addr addr,
static uint32_t apb_config_readl (void *opaque,
a_target_phys_addr addr)
target_phys_addr_t addr)
//PCIBus *s = opaque;
uint32_t val;
......@@ -148,25 +148,25 @@ static CPUReadMemoryFunc * const pci_apb_read[] = {
static void pci_apb_iowriteb (void *opaque, a_target_phys_addr addr,
static void pci_apb_iowriteb (void *opaque, target_phys_addr_t addr,
uint32_t val)
cpu_outb(addr & IOPORTS_MASK, val);
static void pci_apb_iowritew (void *opaque, a_target_phys_addr addr,
static void pci_apb_iowritew (void *opaque, target_phys_addr_t addr,
uint32_t val)
cpu_outw(addr & IOPORTS_MASK, val);
static void pci_apb_iowritel (void *opaque, a_target_phys_addr addr,
static void pci_apb_iowritel (void *opaque, target_phys_addr_t addr,
uint32_t val)
cpu_outl(addr & IOPORTS_MASK, val);
static uint32_t pci_apb_ioreadb (void *opaque, a_target_phys_addr addr)
static uint32_t pci_apb_ioreadb (void *opaque, target_phys_addr_t addr)