Commit 76cb6584 authored by Tom Musta's avatar Tom Musta Committed by Alexander Graf

target-ppc: Altivec's mtvscr Decodes Wrong Register

The Move to Vector Status and Control Register (mtvscr) instruction
uses VRB as the source register.  Fix the code generator to correctly
decode the VRB field.  That is, use "rB(ctx->opcode)" instead of
"rD(ctx->opcode)".
Signed-off-by: 's avatarTom Musta <tommusta@gmail.com>
Signed-off-by: 's avatarAlexander Graf <agraf@suse.de>
parent f2a64032
......@@ -6848,7 +6848,7 @@ static void gen_mtvscr(DisasContext *ctx)
gen_exception(ctx, POWERPC_EXCP_VPU);
return;
}
p = gen_avr_ptr(rD(ctx->opcode));
p = gen_avr_ptr(rB(ctx->opcode));
gen_helper_mtvscr(cpu_env, p);
tcg_temp_free_ptr(p);
}
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment