Commit 39bffca2 authored by Anthony Liguori's avatar Anthony Liguori

qdev: register all types natively through QEMU Object Model

This was done in a mostly automated fashion.  I did it in three steps and then
rebased it into a single step which avoids repeatedly touching every file in
the tree.

The first step was a sed-based addition of the parent type to the subclass
registration functions.

The second step was another sed-based removal of subclass registration functions
while also adding virtual functions from the base class into a class_init
function as appropriate.

Finally, a python script was used to convert the DeviceInfo structures and
qdev_register_subclass functions to TypeInfo structures, class_init functions,
and type_register_static calls.

We are almost fully converted to QOM after this commit.
Signed-off-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
parent 212ad111
......@@ -174,6 +174,7 @@ static Property virtio_9p_properties[] = {
static void virtio_9p_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->init = virtio_9p_init_pci;
......@@ -181,19 +182,20 @@ static void virtio_9p_class_init(ObjectClass *klass, void *data)
k->device_id = 0x1009;
k->revision = VIRTIO_PCI_ABI_VERSION;
k->class_id = 0x2;
dc->props = virtio_9p_properties;
dc->reset = virtio_pci_reset;
}
static DeviceInfo virtio_9p_info = {
.name = "virtio-9p-pci",
.size = sizeof(VirtIOPCIProxy),
.props = virtio_9p_properties,
.class_init = virtio_9p_class_init,
.reset = virtio_pci_reset,
static TypeInfo virtio_9p_info = {
.name = "virtio-9p-pci",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(VirtIOPCIProxy),
.class_init = virtio_9p_class_init,
};
static void virtio_9p_register_devices(void)
{
pci_qdev_register(&virtio_9p_info);
type_register_static(&virtio_9p_info);
virtio_9p_set_fd_limit();
}
......
......@@ -208,35 +208,39 @@ static const VMStateDescription vmstate_a9mp_priv = {
}
};
static Property a9mp_priv_properties[] = {
DEFINE_PROP_UINT32("num-cpu", a9mp_priv_state, num_cpu, 1),
/* The Cortex-A9MP may have anything from 0 to 224 external interrupt
* IRQ lines (with another 32 internal). We default to 64+32, which
* is the number provided by the Cortex-A9MP test chip in the
* Realview PBX-A9 and Versatile Express A9 development boards.
* Other boards may differ and should set this property appropriately.
*/
DEFINE_PROP_UINT32("num-irq", a9mp_priv_state, num_irq, 96),
DEFINE_PROP_END_OF_LIST(),
};
static void a9mp_priv_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = a9mp_priv_init;
dc->props = a9mp_priv_properties;
dc->vmsd = &vmstate_a9mp_priv;
dc->reset = a9mp_priv_reset;
}
static DeviceInfo a9mp_priv_info = {
.name = "a9mpcore_priv",
.size = sizeof(a9mp_priv_state),
.vmsd = &vmstate_a9mp_priv,
.reset = a9mp_priv_reset,
.class_init = a9mp_priv_class_init,
.props = (Property[]) {
DEFINE_PROP_UINT32("num-cpu", a9mp_priv_state, num_cpu, 1),
/* The Cortex-A9MP may have anything from 0 to 224 external interrupt
* IRQ lines (with another 32 internal). We default to 64+32, which
* is the number provided by the Cortex-A9MP test chip in the
* Realview PBX-A9 and Versatile Express A9 development boards.
* Other boards may differ and should set this property appropriately.
*/
DEFINE_PROP_UINT32("num-irq", a9mp_priv_state, num_irq, 96),
DEFINE_PROP_END_OF_LIST(),
}
static TypeInfo a9mp_priv_info = {
.name = "a9mpcore_priv",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(a9mp_priv_state),
.class_init = a9mp_priv_class_init,
};
static void a9mp_register_devices(void)
{
sysbus_register_withprop(&a9mp_priv_info);
type_register_static(&a9mp_priv_info);
}
device_init(a9mp_register_devices)
......@@ -1351,6 +1351,7 @@ static Property ac97_properties[] = {
static void ac97_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->init = ac97_initfn;
......@@ -1359,20 +1360,21 @@ static void ac97_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_INTEL_82801AA_5;
k->revision = 0x01;
k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
dc->desc = "Intel 82801AA AC97 Audio";
dc->vmsd = &vmstate_ac97;
dc->props = ac97_properties;
}
static DeviceInfo ac97_info = {
.name = "AC97",
.desc = "Intel 82801AA AC97 Audio",
.size = sizeof (AC97LinkState),
.vmsd = &vmstate_ac97,
.props = ac97_properties,
.class_init = ac97_class_init,
static TypeInfo ac97_info = {
.name = "AC97",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof (AC97LinkState),
.class_init = ac97_class_init,
};
static void ac97_register (void)
{
pci_qdev_register (&ac97_info);
type_register_static(&ac97_info);
}
device_init (ac97_register);
......@@ -403,6 +403,7 @@ static Property piix4_pm_properties[] = {
static void piix4_pm_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->no_hotplug = 1;
......@@ -412,21 +413,22 @@ static void piix4_pm_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3;
k->revision = 0x03;
k->class_id = PCI_CLASS_BRIDGE_OTHER;
dc->desc = "PM";
dc->no_user = 1;
dc->vmsd = &vmstate_acpi;
dc->props = piix4_pm_properties;
}
static DeviceInfo piix4_pm_info = {
.name = "PIIX4_PM",
.desc = "PM",
.size = sizeof(PIIX4PMState),
.vmsd = &vmstate_acpi,
.no_user = 1,
.props = piix4_pm_properties,
.class_init = piix4_pm_class_init,
static TypeInfo piix4_pm_info = {
.name = "PIIX4_PM",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PIIX4PMState),
.class_init = piix4_pm_class_init,
};
static void piix4_pm_register(void)
{
pci_qdev_register(&piix4_pm_info);
type_register_static(&piix4_pm_info);
}
device_init(piix4_pm_register);
......
......@@ -161,15 +161,16 @@ static void ads7846_class_init(ObjectClass *klass, void *data)
k->transfer = ads7846_transfer;
}
static DeviceInfo ads7846_info = {
.name = "ads7846",
.size = sizeof(ADS7846State),
.class_init = ads7846_class_init,
static TypeInfo ads7846_info = {
.name = "ads7846",
.parent = TYPE_SSI_SLAVE,
.instance_size = sizeof(ADS7846State),
.class_init = ads7846_class_init,
};
static void ads7846_register_devices(void)
{
ssi_register_slave(&ads7846_info);
type_register_static(&ads7846_info);
}
device_init(ads7846_register_devices)
......@@ -810,20 +810,22 @@ static int typhoon_pcihost_init(SysBusDevice *dev)
static void typhoon_pcihost_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = typhoon_pcihost_init;
dc->no_user = 1;
}
static DeviceInfo typhoon_pcihost_info = {
.name = "typhoon-pcihost",
.size = sizeof(TyphoonState),
.no_user = 1,
.class_init = typhoon_pcihost_class_init,
static TypeInfo typhoon_pcihost_info = {
.name = "typhoon-pcihost",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(TyphoonState),
.class_init = typhoon_pcihost_class_init,
};
static void typhoon_register(void)
{
sysbus_register_withprop(&typhoon_pcihost_info);
type_register_static(&typhoon_pcihost_info);
}
device_init(typhoon_register);
......@@ -447,28 +447,32 @@ static void pbm_pci_host_class_init(ObjectClass *klass, void *data)
k->is_bridge = 1;
}
static DeviceInfo pbm_pci_host_info = {
.name = "pbm-pci",
.size = sizeof(PCIDevice),
.class_init = pbm_pci_host_class_init,
static TypeInfo pbm_pci_host_info = {
.name = "pbm-pci",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIDevice),
.class_init = pbm_pci_host_class_init,
};
static void pbm_host_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = pci_pbm_init_device;
dc->reset = pci_pbm_reset;
}
static DeviceInfo pbm_host_info = {
.name = "pbm",
.size = sizeof(APBState),
.reset = pci_pbm_reset,
.class_init = pbm_host_class_init,
static TypeInfo pbm_host_info = {
.name = "pbm",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(APBState),
.class_init = pbm_host_class_init,
};
static void pbm_pci_bridge_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->init = apb_pci_bridge_initfn;
......@@ -478,21 +482,22 @@ static void pbm_pci_bridge_class_init(ObjectClass *klass, void *data)
k->revision = 0x11;
k->config_write = pci_bridge_write_config;
k->is_bridge = 1;
dc->reset = pci_bridge_reset;
dc->vmsd = &vmstate_pci_device;
}
static DeviceInfo pbm_pci_bridge_info = {
.name = "pbm-bridge",
.size = sizeof(PCIBridge),
.vmsd = &vmstate_pci_device,
.reset = pci_bridge_reset,
.class_init = pbm_pci_bridge_class_init,
static TypeInfo pbm_pci_bridge_info = {
.name = "pbm-bridge",
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PCIBridge),
.class_init = pbm_pci_bridge_class_init,
};
static void pbm_register_devices(void)
{
sysbus_register_withprop(&pbm_host_info);
pci_qdev_register(&pbm_pci_host_info);
pci_qdev_register(&pbm_pci_bridge_info);
type_register_static(&pbm_host_info);
type_register_static(&pbm_pci_host_info);
type_register_static(&pbm_pci_bridge_info);
}
device_init(pbm_register_devices)
......@@ -774,14 +774,16 @@ static void apic_class_init(ObjectClass *klass, void *data)
k->post_load = apic_post_load;
}
static DeviceInfo apic_info = {
.name = "apic",
.class_init = apic_class_init,
static TypeInfo apic_info = {
.name = "apic",
.instance_size = sizeof(APICCommonState),
.parent = TYPE_APIC_COMMON,
.class_init = apic_class_init,
};
static void apic_register_devices(void)
{
apic_qdev_register(&apic_info);
type_register_static(&apic_info);
}
device_init(apic_register_devices)
......@@ -295,7 +295,12 @@ static Property apic_properties_common[] = {
static void apic_common_class_init(ObjectClass *klass, void *data)
{
SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_apic_common;
dc->reset = apic_reset_common;
dc->no_user = 1;
dc->props = apic_properties_common;
sc->init = apic_init_common;
}
......@@ -308,16 +313,6 @@ static TypeInfo apic_common_type = {
.abstract = true,
};
void apic_qdev_register(DeviceInfo *info)
{
info->size = sizeof(APICCommonState),
info->vmsd = &vmstate_apic_common;
info->reset = apic_reset_common;
info->no_user = 1;
info->props = apic_properties_common;
sysbus_qdev_register_subclass(info, TYPE_APIC_COMMON);
}
static void register_devices(void)
{
type_register_static(&apic_common_type);
......
......@@ -117,7 +117,6 @@ struct APICCommonState {
};
void apic_report_irq_delivered(int delivered);
void apic_qdev_register(DeviceInfo *info);
bool apic_next_timer(APICCommonState *s, int64_t current_time);
#endif /* !QEMU_APIC_INTERNAL_H */
......@@ -220,28 +220,32 @@ static int applesmc_isa_init(ISADevice *dev)
return 0;
}
static Property applesmc_isa_properties[] = {
DEFINE_PROP_HEX32("iobase", struct AppleSMCStatus, iobase,
APPLESMC_DEFAULT_IOBASE),
DEFINE_PROP_STRING("osk", struct AppleSMCStatus, osk),
DEFINE_PROP_END_OF_LIST(),
};
static void qdev_applesmc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
ic->init = applesmc_isa_init;
dc->reset = qdev_applesmc_isa_reset;
dc->props = applesmc_isa_properties;
}
static DeviceInfo applesmc_isa_info = {
.name = "isa-applesmc",
.size = sizeof(struct AppleSMCStatus),
.reset = qdev_applesmc_isa_reset,
.class_init = qdev_applesmc_class_init,
.props = (Property[]) {
DEFINE_PROP_HEX32("iobase", struct AppleSMCStatus, iobase,
APPLESMC_DEFAULT_IOBASE),
DEFINE_PROP_STRING("osk", struct AppleSMCStatus, osk),
DEFINE_PROP_END_OF_LIST(),
},
static TypeInfo applesmc_isa_info = {
.name = "isa-applesmc",
.parent = TYPE_ISA_DEVICE,
.instance_size = sizeof(struct AppleSMCStatus),
.class_init = qdev_applesmc_class_init,
};
static void applesmc_register_devices(void)
{
isa_qdev_register(&applesmc_isa_info);
type_register_static(&applesmc_isa_info);
}
device_init(applesmc_register_devices)
......@@ -217,16 +217,18 @@ static Property mpcore_rirq_properties[] = {
static void mpcore_rirq_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = realview_mpcore_init;
dc->props = mpcore_rirq_properties;
}
static DeviceInfo mpcore_rirq_info = {
.name = "realview_mpcore",
.size = sizeof(mpcore_rirq_state),
.props = mpcore_rirq_properties,
.class_init = mpcore_rirq_class_init,
static TypeInfo mpcore_rirq_info = {
.name = "realview_mpcore",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(mpcore_rirq_state),
.class_init = mpcore_rirq_class_init,
};
static Property mpcore_priv_properties[] = {
......@@ -236,22 +238,24 @@ static Property mpcore_priv_properties[] = {
static void mpcore_priv_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = mpcore_priv_init;
dc->props = mpcore_priv_properties;
}
static DeviceInfo mpcore_priv_info = {
.name = "arm11mpcore_priv",
.size = sizeof(mpcore_priv_state),
.props = mpcore_priv_properties,
.class_init = mpcore_priv_class_init,
static TypeInfo mpcore_priv_info = {
.name = "arm11mpcore_priv",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(mpcore_priv_state),
.class_init = mpcore_priv_class_init,
};
static void arm11mpcore_register_devices(void)
{
sysbus_register_withprop(&mpcore_rirq_info);
sysbus_register_withprop(&mpcore_priv_info);
type_register_static(&mpcore_rirq_info);
type_register_static(&mpcore_priv_info);
}
device_init(arm11mpcore_register_devices)
......@@ -160,29 +160,33 @@ static int l2x0_priv_init(SysBusDevice *dev)
return 0;
}
static Property l2x0_properties[] = {
DEFINE_PROP_UINT32("type", l2x0_state, cache_type, 0x1c100100),
DEFINE_PROP_END_OF_LIST(),
};
static void l2x0_class_init(ObjectClass *klass, void *data)
{
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
k->init = l2x0_priv_init;
dc->vmsd = &vmstate_l2x0;
dc->no_user = 1;
dc->props = l2x0_properties;
dc->reset = l2x0_priv_reset;
}
static DeviceInfo l2x0_info = {
static TypeInfo l2x0_info = {
.name = "l2x0",
.size = sizeof(l2x0_state),
.vmsd = &vmstate_l2x0,
.no_user = 1,
.props = (Property[]) {
DEFINE_PROP_UINT32("type", l2x0_state, cache_type, 0x1c100100),
DEFINE_PROP_END_OF_LIST(),
},
.reset = l2x0_priv_reset,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(l2x0_state),
.class_init = l2x0_class_init,
};
static void l2x0_register_device(void)
{
sysbus_qdev_register(&l2x0_info);
type_register_static(&l2x0_info);
}
device_init(l2x0_register_device)
......@@ -311,29 +311,33 @@ static const VMStateDescription vmstate_arm_mptimer = {
}
};
static Property arm_mptimer_properties[] = {
DEFINE_PROP_UINT32("num-cpu", arm_mptimer_state, num_cpu, 0),
DEFINE_PROP_END_OF_LIST()
};
static void arm_mptimer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
sbc->init = arm_mptimer_init;
dc->vmsd = &vmstate_arm_mptimer;
dc->reset = arm_mptimer_reset;
dc->no_user = 1;
dc->props = arm_mptimer_properties;
}
static DeviceInfo arm_mptimer_info = {
.name = "arm_mptimer",
.size = sizeof(arm_mptimer_state),
.vmsd = &vmstate_arm_mptimer,
.reset = arm_mptimer_reset,
.no_user = 1,
.class_init = arm_mptimer_class_init,
.props = (Property[]) {
DEFINE_PROP_UINT32("num-cpu", arm_mptimer_state, num_cpu, 0),
DEFINE_PROP_END_OF_LIST()
}
static TypeInfo arm_mptimer_info = {
.name = "arm_mptimer",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(arm_mptimer_state),
.class_init = arm_mptimer_class_init,
};
static void arm_mptimer_register_devices(void)
{
sysbus_register_withprop(&arm_mptimer_info);
type_register_static(&arm_mptimer_info);
}
device_init(arm_mptimer_register_devices)
......@@ -409,23 +409,25 @@ static Property arm_sysctl_properties[] = {
static void arm_sysctl_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = arm_sysctl_init1;
dc->reset = arm_sysctl_reset;
dc->vmsd = &vmstate_arm_sysctl;
dc->props = arm_sysctl_properties;
}
static DeviceInfo arm_sysctl_info = {
.name = "realview_sysctl",
.size = sizeof(arm_sysctl_state),
.vmsd = &vmstate_arm_sysctl,
.reset = arm_sysctl_reset,
.props = arm_sysctl_properties,
.class_init = arm_sysctl_class_init,
static TypeInfo arm_sysctl_info = {
.name = "realview_sysctl",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(arm_sysctl_state),
.class_init = arm_sysctl_class_init,
};
static void arm_sysctl_register_devices(void)
{
sysbus_register_withprop(&arm_sysctl_info);
type_register_static(&arm_sysctl_info);
}
device_init(arm_sysctl_register_devices)
......@@ -354,34 +354,39 @@ static void icp_pit_class_init(ObjectClass *klass, void *data)
sdc->init = icp_pit_init;
}
static DeviceInfo icp_pit_info = {
.name = "integrator_pit",
.size = sizeof(icp_pit_state),
.class_init = icp_pit_class_init,
static TypeInfo icp_pit_info = {
.name = "integrator_pit",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(icp_pit_state),
.class_init = icp_pit_class_init,
};
static Property sp804_properties[] = {
DEFINE_PROP_UINT32("freq0", sp804_state, freq0, 1000000),
DEFINE_PROP_UINT32("freq1", sp804_state, freq1, 1000000),
DEFINE_PROP_END_OF_LIST(),
};
static void sp804_class_init(ObjectClass *klass, void *data)
{
SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
DeviceClass *k = DEVICE_CLASS(klass);
sdc->init = sp804_init;
k->props = sp804_properties;
}
static DeviceInfo sp804_info = {
.name = "sp804",
.size = sizeof(sp804_state),
.class_init = sp804_class_init,
.props = (Property[]) {
DEFINE_PROP_UINT32("freq0", sp804_state, freq0, 1000000),
DEFINE_PROP_UINT32("freq1", sp804_state, freq1, 1000000),
DEFINE_PROP_END_OF_LIST(),
}
static TypeInfo sp804_info = {
.name = "sp804",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(sp804_state),
.class_init = sp804_class_init,
};
static void arm_timer_register_devices(void)
{
sysbus_qdev_register(&icp_pit_info);
sysbus_qdev_register(&sp804_info);
type_register_static(&icp_pit_info);
type_register_static(&sp804_info);