Commit 1c38f843 authored by Tom Musta's avatar Tom Musta Committed by Alexander Graf

monitor: QEMU Monitor Instruction Disassembly Incorrect for PowerPC LE Mode

The monitor support for disassembling instructions does not honor the MSR[LE]
bit for PowerPC processors.

This change enhances the monitor_disas() routine by supporting a flag bit
for Little Endian mode.  Bit 16 is used since that bit was used in the
analagous guest disassembly routine target_disas().

Also, to be consistent with target_disas(), the disassembler bfd_mach field
can be passed in the flags argument.
Reported-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarTom Musta <tommusta@gmail.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent e13951f8
......@@ -445,6 +445,8 @@ monitor_fprintf(FILE *stream, const char *fmt, ...)
return 0;
}
/* Disassembler for the monitor.
See target_disas for a description of flags. */
void monitor_disas(Monitor *mon, CPUArchState *env,
target_ulong pc, int nb_insn, int is_physical, int flags)
{
......@@ -485,11 +487,19 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
s.info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
if (flags & 0xFFFF) {
/* If we have a precise definition of the instruction set, use it. */
s.info.mach = flags & 0xFFFF;
} else {
#ifdef TARGET_PPC64
s.info.mach = bfd_mach_ppc64;
s.info.mach = bfd_mach_ppc64;
#else
s.info.mach = bfd_mach_ppc;
s.info.mach = bfd_mach_ppc;
#endif
}
if ((flags >> 16) & 1) {
s.info.endian = BFD_ENDIAN_LITTLE;
}
print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
print_insn = print_insn_m68k;
......
......@@ -1284,6 +1284,10 @@ static void memory_dump(Monitor *mon, int count, int format, int wsize,
flags = 1;
}
}
#endif
#ifdef TARGET_PPC
flags = msr_le << 16;
flags |= env->bfd_mach;
#endif
monitor_disas(mon, env, addr, count, is_physical, flags);
return;
......
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