1. 17 Aug, 2014 2 commits
    • Mark Cave-Ayland's avatar
      apb: add IOMMU flush register implementation · b87b0644
      Mark Cave-Ayland authored
      The IOMMU flush register is a write-only register used to remove entries from the
      hardware TLB. Allow guest writes to this register as a no-op, and return a value
      of 0 for reads.
      
      This fixes IOMMU DMA operations under NetBSD SPARC64.
      Signed-off-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
      b87b0644
    • Mark Cave-Ayland's avatar
      sun4u: switch second PCI-ebus bridge BAR over to PCI IO space · a1cf8be5
      Mark Cave-Ayland authored
      The ebus is the sun4u equivalent of the old ISA bus which is already mapped at
      the beginning of PCI IO space within QEMU. NetBSD attempts to find the physical
      addresses of devices connected to the ebus by parsing the BARs of the PCI-ebus
      bridge and using the base address found by matching both the address space
      type and range for a particular ebus address.
      
      Since the second PCI-ebus bridge BAR is already aliased onto IO space, switch
      the BAR over to match and reduce the size to 0x1000 which is enough to cover
      all the legacy ioport devices whilst leaving the remaining IO space for other
      PCI devices. This allows NetBSD SPARC64 to correctly detect and access devices
      on the ebus.
      Signed-off-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
      a1cf8be5
  2. 15 Aug, 2014 38 commits