1. 31 Jan, 2014 9 commits
  2. 30 Jan, 2014 6 commits
    • Peter Maydell's avatar
      Merge remote-tracking branch 'mst/tags/for_anthony' into staging · 0159a643
      Peter Maydell authored
      acpi,pci,pc,virtio fixes and enhancements
      This includes new unit-tests for acpi by Marcel,
      hotplug for pci bridges by myself (piix only so far)
      and cpu hotplug for q35.
      And a bunch of fixes all over the place as usual.
      I included the patch to fix memory alignment for q35
      as well - even though it limits 32 bit guests to 3G (they
      previously could address more memory with PAE).
      To remove the limit, this will have to be fixed in seabios.
      I also added self as virtio co-maintainer so I don't need
      to troll the list for patches to review.
      Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      # gpg: Signature made Sun 26 Jan 2014 11:12:09 GMT using RSA key ID D28D5469
      # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
      # gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
      #      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469
      * mst/tags/for_anthony: (35 commits)
        MAINTAINERS: add self as virtio co-maintainer
        q35: document gigabyte_align
        q35: gigabyte alignment for ram
        acpi: Fix PCI hole handling on build_srat()
        pc: Save size of RAM below 4GB
        hw/pci: fix error flow in pci multifunction init
        acpi-test: update expected AML since recent changes
        pc: ACPI: update acpi-dsdt.hex.generated q35-acpi-dsdt.hex.generated
        pc: ACPI: unify source of CPU hotplug IO base/len
        pc: ACPI: expose PRST IO range via _CRS
        pc: Q35 DSDT: exclude CPU hotplug IO range from PCI bus resources
        pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources
        pc: set PRST base in DSDT depending on chipset
        acpi: ich9: add CPU hotplug handling to Q35 machine
        acpi: factor out common cpu hotplug code for PIIX4/Q35
        acpi-build: enable hotplug for PCI bridges
        piix4: add acpi pci hotplug support
        pcihp: generalization of piix4 acpi
        pci: add pci_for_each_bus_depth_first
        pc: make: fix dependencies: rebuild when included file is changed
      Message-id: 1390735289-15563-1-git-send-email-mst@redhat.com
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    • Peter Maydell's avatar
      Merge remote-tracking branch 'sstabellini/xen-170114' into staging · 97374ce5
      Peter Maydell authored
      * sstabellini/xen-170114:
        xen_pt: Fix passthrough of device with ROM.
        xen_pt: Fix debug output.
        xenfb: map framebuffer read-only and handle unmap errors
      Message-id: alpine.DEB.2.02.1401171537140.21510@kaball.uk.xensource.com
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    • Peter Maydell's avatar
      Merge remote-tracking branch 'stefanha/tags/net-pull-request' into staging · 8e02b359
      Peter Maydell authored
      Net patches
      # gpg: Signature made Mon 27 Jan 2014 14:45:35 GMT using RSA key ID 81AB73C8
      # gpg: Can't check signature: public key not found
      * stefanha/tags/net-pull-request:
        tap-linux: Get features once and use it many times
        Fix lan9118 buffer length handling
        Fix lan9118 TX "CMD A" handling
        net: Use g_strdup_printf instead of snprintf.
      Message-id: 1390834129-19625-1-git-send-email-stefanha@redhat.com
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    • Peter Maydell's avatar
      Merge remote-tracking branch 'rth/tcg-movbe' into staging · dc08f851
      Peter Maydell authored
      * rth/tcg-movbe:
        tcg/i386: cleanup useless #ifdef
        tcg/i386: use movbe instruction in qemu_ldst routines
        tcg/i386: add support for three-byte opcodes
        tcg/i386: remove hardcoded P_REXW value
        disas/i386.c: disassemble movbe instruction
      Message-id: 1390692772-15282-1-git-send-email-rth@twiddle.net
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    • Peter Maydell's avatar
      Merge remote-tracking branch 'mjt/tags/trivial-patches-2014-01-16' into staging · 0706f7c8
      Peter Maydell authored
      trivial-patches for 2014-01-16
      # gpg: Signature made Thu 16 Jan 2014 17:29:05 GMT using RSA key ID 74F0C838
      # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
      # gpg:                 aka "Michael Tokarev <mjt@corpit.ru>"
      # gpg:                 aka "Michael Tokarev <mjt@debian.org>"
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
      #      Subkey fingerprint: E190 8639 3B10 B51B AC2C  8B73 5253 C5AD 74F0 C838
      Message-id: 1389893719-16336-1-git-send-email-mjt@msgid.tls.msk.ru
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
    • Alexander Graf's avatar
      TCG: Fix I64-on-32bit-host temporaries · 18d13fa2
      Alexander Graf authored
      We have cache pools of temporaries that we can reuse later when they've
      already been allocated before.
      These cache pools differenciate between the target TCG variable type they
      contain. So we have one pool for I32 and one pool for I64 variables.
      On a 32bit system, we can't work with 64bit registers though. So instead we
      spawn two I32 temporaries for every I64 temporary we create. All caching
      works the same way as on a real 64-bit system though: We create a cache entry
      in the 64bit array for the first i32 index.
      However, when we free such a temporary we free it to the pool of its type
      (which is always i32 on 32bit systems) rather than its base_type (which is
      i64 or i32 depending on the variable). This means we put a temporary that
      is of base_type == i64 into the i32 preallocated temporary pool.
      Eventually, this results in failures like this on 32bit hosts:
        qemu-system-ppc64: tcg/tcg.c:515: tcg_temp_new_internal: Assertion `ts->base_type == type' failed.
      This patch makes the free routine use the base_type instead for the free case,
      so it's consistent with the temporary allocation. It fixes the above failure
      for me.
      Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
      Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
      Message-id: 1390146811-59936-1-git-send-email-agraf@suse.de
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
  3. 27 Jan, 2014 8 commits
  4. 26 Jan, 2014 17 commits