Commit d2ac63e0 authored by bellard's avatar bellard
Browse files

added HF_HALTED bit


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1651 c046a42c-6fe2-441c-8c8c-71466251a162
parent ad49ff9d
......@@ -116,7 +116,7 @@
#define ID_MASK 0x00200000
/* hidden flags - used internally by qemu to represent additionnal cpu
states. Only the CPL and INHIBIT_IRQ are not redundant. We avoid
states. Only the CPL, INHIBIT_IRQ and HALTED are not redundant. We avoid
using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring
with eflags. */
/* current cpl */
......@@ -141,6 +141,7 @@
#define HF_CS64_SHIFT 15 /* only used on x86_64: 64 bit code segment */
#define HF_OSFXSR_SHIFT 16 /* CR4.OSFXSR */
#define HF_VM_SHIFT 17 /* must be same as eflags */
#define HF_HALTED_SHIFT 18 /* CPU halted */
#define HF_CPL_MASK (3 << HF_CPL_SHIFT)
#define HF_SOFTMMU_MASK (1 << HF_SOFTMMU_SHIFT)
......@@ -156,6 +157,7 @@
#define HF_LMA_MASK (1 << HF_LMA_SHIFT)
#define HF_CS64_MASK (1 << HF_CS64_SHIFT)
#define HF_OSFXSR_MASK (1 << HF_OSFXSR_SHIFT)
#define HF_HALTED_MASK (1 << HF_HALTED_SHIFT)
#define CR0_PE_MASK (1 << 0)
#define CR0_MP_MASK (1 << 1)
......
......@@ -265,7 +265,7 @@ void cpu_dump_state(CPUState *env, FILE *f,
"RSI=%016llx RDI=%016llx RBP=%016llx RSP=%016llx\n"
"R8 =%016llx R9 =%016llx R10=%016llx R11=%016llx\n"
"R12=%016llx R13=%016llx R14=%016llx R15=%016llx\n"
"RIP=%016llx RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d\n",
"RIP=%016llx RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d HLT=%d\n",
env->regs[R_EAX],
env->regs[R_EBX],
env->regs[R_ECX],
......@@ -292,13 +292,14 @@ void cpu_dump_state(CPUState *env, FILE *f,
eflags & CC_C ? 'C' : '-',
env->hflags & HF_CPL_MASK,
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1,
(env->a20_mask >> 20) & 1);
(env->a20_mask >> 20) & 1,
(env->hflags >> HF_HALTED_SHIFT) & 1);
} else
#endif
{
cpu_fprintf(f, "EAX=%08x EBX=%08x ECX=%08x EDX=%08x\n"
"ESI=%08x EDI=%08x EBP=%08x ESP=%08x\n"
"EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d\n",
"EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d HLT=%d\n",
(uint32_t)env->regs[R_EAX],
(uint32_t)env->regs[R_EBX],
(uint32_t)env->regs[R_ECX],
......@@ -317,7 +318,8 @@ void cpu_dump_state(CPUState *env, FILE *f,
eflags & CC_C ? 'C' : '-',
env->hflags & HF_CPL_MASK,
(env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1,
(env->a20_mask >> 20) & 1);
(env->a20_mask >> 20) & 1,
(env->hflags >> HF_HALTED_SHIFT) & 1);
}
#ifdef TARGET_X86_64
......
......@@ -615,6 +615,7 @@ void OPPROTO op_movq_eip_im64(void)
void OPPROTO op_hlt(void)
{
env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
env->hflags |= HF_HALTED_MASK;
env->exception_index = EXCP_HLT;
cpu_loop_exit();
}
......
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