Commit a47dddd7 authored by Andreas Färber's avatar Andreas Färber

exec: Change cpu_abort() argument to CPUState

Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
parent bb0e627a
......@@ -322,7 +322,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
if (cc->do_unassigned_access) {
cc->do_unassigned_access(cpu, addr, false, true, 0, 4);
} else {
cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x"
cpu_abort(cpu, "Trying to execute code outside RAM or ROM at 0x"
TARGET_FMT_lx "\n", addr);
}
}
......
......@@ -709,9 +709,8 @@ void cpu_single_step(CPUState *cpu, int enabled)
#endif
}
void cpu_abort(CPUArchState *env, const char *fmt, ...)
void cpu_abort(CPUState *cpu, const char *fmt, ...)
{
CPUState *cpu = ENV_GET_CPU(env);
va_list ap;
va_list ap2;
......
......@@ -360,9 +360,6 @@ int page_check_range(target_ulong start, target_ulong len, int flags);
CPUArchState *cpu_copy(CPUArchState *env);
void QEMU_NORETURN cpu_abort(CPUArchState *env, const char *fmt, ...)
GCC_FMT_ATTR(2, 3);
/* Flags for use in ENV->INTERRUPT_PENDING.
The numbers assigned here are non-sequential in order to preserve
......
......@@ -617,6 +617,9 @@ int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint);
void cpu_watchpoint_remove_all(CPUState *cpu, int mask);
void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
GCC_FMT_ATTR(2, 3);
#ifdef CONFIG_SOFTMMU
extern const struct VMStateDescription vmstate_cpu_common;
#else
......
......@@ -98,6 +98,7 @@ static int translate_openflags(int flags)
#define ARG(x) tswap32(args[x])
void do_m68k_simcall(CPUM68KState *env, int nr)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
uint32_t *args;
args = (uint32_t *)(unsigned long)(env->aregs[7] + 4);
......@@ -165,6 +166,6 @@ void do_m68k_simcall(CPUM68KState *env, int nr)
check_err(env, lseek(ARG(0), (int32_t)ARG(1), ARG(2)));
break;
default:
cpu_abort(env, "Unsupported m68k sim syscall %d\n", nr);
cpu_abort(CPU(cpu), "Unsupported m68k sim syscall %d\n", nr);
}
}
......@@ -1577,11 +1577,11 @@ void cpu_loop(CPUPPCState *env)
/* Just go on */
break;
case POWERPC_EXCP_CRITICAL: /* Critical input */
cpu_abort(env, "Critical interrupt while in user mode. "
cpu_abort(cs, "Critical interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_MCHECK: /* Machine check exception */
cpu_abort(env, "Machine check exception while in user mode. "
cpu_abort(cs, "Machine check exception while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_DSI: /* Data storage exception */
......@@ -1645,7 +1645,7 @@ void cpu_loop(CPUPPCState *env)
queue_signal(env, info.si_signo, &info);
break;
case POWERPC_EXCP_EXTERNAL: /* External input */
cpu_abort(env, "External interrupt while in user mode. "
cpu_abort(cs, "External interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_ALIGN: /* Alignment exception */
......@@ -1739,11 +1739,11 @@ void cpu_loop(CPUPPCState *env)
}
break;
case POWERPC_EXCP_TRAP:
cpu_abort(env, "Tried to call a TRAP\n");
cpu_abort(cs, "Tried to call a TRAP\n");
break;
default:
/* Should not happen ! */
cpu_abort(env, "Unknown program exception (%02x)\n",
cpu_abort(cs, "Unknown program exception (%02x)\n",
env->error_code);
break;
}
......@@ -1759,7 +1759,7 @@ void cpu_loop(CPUPPCState *env)
queue_signal(env, info.si_signo, &info);
break;
case POWERPC_EXCP_SYSCALL: /* System call exception */
cpu_abort(env, "Syscall exception while in user mode. "
cpu_abort(cs, "Syscall exception while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
......@@ -1771,23 +1771,23 @@ void cpu_loop(CPUPPCState *env)
queue_signal(env, info.si_signo, &info);
break;
case POWERPC_EXCP_DECR: /* Decrementer exception */
cpu_abort(env, "Decrementer interrupt while in user mode. "
cpu_abort(cs, "Decrementer interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
cpu_abort(env, "Fix interval timer interrupt while in user mode. "
cpu_abort(cs, "Fix interval timer interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
cpu_abort(env, "Watchdog timer interrupt while in user mode. "
cpu_abort(cs, "Watchdog timer interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_DTLB: /* Data TLB error */
cpu_abort(env, "Data TLB exception while in user mode. "
cpu_abort(cs, "Data TLB exception while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_ITLB: /* Instruction TLB error */
cpu_abort(env, "Instruction TLB exception while in user mode. "
cpu_abort(cs, "Instruction TLB exception while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
......@@ -1799,37 +1799,37 @@ void cpu_loop(CPUPPCState *env)
queue_signal(env, info.si_signo, &info);
break;
case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
cpu_abort(cs, "Embedded floating-point data IRQ not handled\n");
break;
case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
cpu_abort(cs, "Embedded floating-point round IRQ not handled\n");
break;
case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
cpu_abort(env, "Performance monitor exception not handled\n");
cpu_abort(cs, "Performance monitor exception not handled\n");
break;
case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
cpu_abort(env, "Doorbell interrupt while in user mode. "
cpu_abort(cs, "Doorbell interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
cpu_abort(env, "Doorbell critical interrupt while in user mode. "
cpu_abort(cs, "Doorbell critical interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_RESET: /* System reset exception */
cpu_abort(env, "Reset interrupt while in user mode. "
cpu_abort(cs, "Reset interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_DSEG: /* Data segment exception */
cpu_abort(env, "Data segment exception while in user mode. "
cpu_abort(cs, "Data segment exception while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_ISEG: /* Instruction segment exception */
cpu_abort(env, "Instruction segment exception "
cpu_abort(cs, "Instruction segment exception "
"while in user mode. Aborting\n");
break;
/* PowerPC 64 with hypervisor mode support */
case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
cpu_abort(env, "Hypervisor decrementer interrupt "
cpu_abort(cs, "Hypervisor decrementer interrupt "
"while in user mode. Aborting\n");
break;
case POWERPC_EXCP_TRACE: /* Trace exception */
......@@ -1839,19 +1839,19 @@ void cpu_loop(CPUPPCState *env)
break;
/* PowerPC 64 with hypervisor mode support */
case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
cpu_abort(env, "Hypervisor data storage exception "
cpu_abort(cs, "Hypervisor data storage exception "
"while in user mode. Aborting\n");
break;
case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
cpu_abort(env, "Hypervisor instruction storage exception "
cpu_abort(cs, "Hypervisor instruction storage exception "
"while in user mode. Aborting\n");
break;
case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
cpu_abort(env, "Hypervisor data segment exception "
cpu_abort(cs, "Hypervisor data segment exception "
"while in user mode. Aborting\n");
break;
case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
cpu_abort(env, "Hypervisor instruction segment exception "
cpu_abort(cs, "Hypervisor instruction segment exception "
"while in user mode. Aborting\n");
break;
case POWERPC_EXCP_VPU: /* Vector unavailable exception */
......@@ -1863,58 +1863,58 @@ void cpu_loop(CPUPPCState *env)
queue_signal(env, info.si_signo, &info);
break;
case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
cpu_abort(env, "Programmable interval timer interrupt "
cpu_abort(cs, "Programmable interval timer interrupt "
"while in user mode. Aborting\n");
break;
case POWERPC_EXCP_IO: /* IO error exception */
cpu_abort(env, "IO error exception while in user mode. "
cpu_abort(cs, "IO error exception while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_RUNM: /* Run mode exception */
cpu_abort(env, "Run mode exception while in user mode. "
cpu_abort(cs, "Run mode exception while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_EMUL: /* Emulation trap exception */
cpu_abort(env, "Emulation trap exception not handled\n");
cpu_abort(cs, "Emulation trap exception not handled\n");
break;
case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
cpu_abort(env, "Instruction fetch TLB exception "
cpu_abort(cs, "Instruction fetch TLB exception "
"while in user-mode. Aborting");
break;
case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
cpu_abort(env, "Data load TLB exception while in user-mode. "
cpu_abort(cs, "Data load TLB exception while in user-mode. "
"Aborting");
break;
case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
cpu_abort(env, "Data store TLB exception while in user-mode. "
cpu_abort(cs, "Data store TLB exception while in user-mode. "
"Aborting");
break;
case POWERPC_EXCP_FPA: /* Floating-point assist exception */
cpu_abort(env, "Floating-point assist exception not handled\n");
cpu_abort(cs, "Floating-point assist exception not handled\n");
break;
case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
cpu_abort(env, "Instruction address breakpoint exception "
cpu_abort(cs, "Instruction address breakpoint exception "
"not handled\n");
break;
case POWERPC_EXCP_SMI: /* System management interrupt */
cpu_abort(env, "System management interrupt while in user mode. "
cpu_abort(cs, "System management interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_THERM: /* Thermal interrupt */
cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
cpu_abort(cs, "Thermal interrupt interrupt while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
cpu_abort(env, "Performance monitor exception not handled\n");
cpu_abort(cs, "Performance monitor exception not handled\n");
break;
case POWERPC_EXCP_VPUA: /* Vector assist exception */
cpu_abort(env, "Vector assist exception not handled\n");
cpu_abort(cs, "Vector assist exception not handled\n");
break;
case POWERPC_EXCP_SOFTP: /* Soft patch exception */
cpu_abort(env, "Soft patch exception not handled\n");
cpu_abort(cs, "Soft patch exception not handled\n");
break;
case POWERPC_EXCP_MAINT: /* Maintenance exception */
cpu_abort(env, "Maintenance exception while in user mode. "
cpu_abort(cs, "Maintenance exception while in user mode. "
"Aborting\n");
break;
case POWERPC_EXCP_STOP: /* stop translation */
......@@ -1970,7 +1970,7 @@ void cpu_loop(CPUPPCState *env)
/* just indicate that signals should be handled asap */
break;
default:
cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
cpu_abort(cs, "Unknown exception 0x%d. Aborting\n", trapnr);
break;
}
process_pending_signals(env);
......
......@@ -452,7 +452,7 @@ void alpha_cpu_do_interrupt(CPUState *cs)
}
break;
default:
cpu_abort(env, "Unhandled CPU exception");
cpu_abort(cs, "Unhandled CPU exception");
}
/* Remember where the exception happened. Emulate real hardware in
......
......@@ -2671,29 +2671,40 @@ int arm_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
/* These should probably raise undefined insn exceptions. */
void HELPER(v7m_msr)(CPUARMState *env, uint32_t reg, uint32_t val)
{
cpu_abort(env, "v7m_mrs %d\n", reg);
ARMCPU *cpu = arm_env_get_cpu(env);
cpu_abort(CPU(cpu), "v7m_msr %d\n", reg);
}
uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg)
{
cpu_abort(env, "v7m_mrs %d\n", reg);
ARMCPU *cpu = arm_env_get_cpu(env);
cpu_abort(CPU(cpu), "v7m_mrs %d\n", reg);
return 0;
}
void switch_mode(CPUARMState *env, int mode)
{
if (mode != ARM_CPU_MODE_USR)
cpu_abort(env, "Tried to switch out of user mode\n");
ARMCPU *cpu = arm_env_get_cpu(env);
if (mode != ARM_CPU_MODE_USR) {
cpu_abort(CPU(cpu), "Tried to switch out of user mode\n");
}
}
void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val)
{
cpu_abort(env, "banked r13 write\n");
ARMCPU *cpu = arm_env_get_cpu(env);
cpu_abort(CPU(cpu), "banked r13 write\n");
}
uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode)
{
cpu_abort(env, "banked r13 read\n");
ARMCPU *cpu = arm_env_get_cpu(env);
cpu_abort(CPU(cpu), "banked r13 read\n");
return 0;
}
......@@ -2892,7 +2903,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
do_v7m_exception_exit(env);
return;
default:
cpu_abort(env, "Unhandled exception 0x%x\n", cs->exception_index);
cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index);
return; /* Never happens. Keep compiler happy. */
}
......@@ -3017,7 +3028,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
offset = 4;
break;
default:
cpu_abort(env, "Unhandled exception 0x%x\n", cs->exception_index);
cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index);
return; /* Never happens. Keep compiler happy. */
}
/* High vectors. */
......@@ -3695,6 +3706,8 @@ uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode)
uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg)
{
ARMCPU *cpu = arm_env_get_cpu(env);
switch (reg) {
case 0: /* APSR */
return xpsr_read(env) & 0xf8000000;
......@@ -3725,13 +3738,15 @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg)
return env->v7m.control;
default:
/* ??? For debugging only. */
cpu_abort(env, "Unimplemented system register read (%d)\n", reg);
cpu_abort(CPU(cpu), "Unimplemented system register read (%d)\n", reg);
return 0;
}
}
void HELPER(v7m_msr)(CPUARMState *env, uint32_t reg, uint32_t val)
{
ARMCPU *cpu = arm_env_get_cpu(env);
switch (reg) {
case 0: /* APSR */
xpsr_write(env, val, 0xf8000000);
......@@ -3794,7 +3809,7 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t reg, uint32_t val)
break;
default:
/* ??? For debugging only. */
cpu_abort(env, "Unimplemented system register write (%d)\n", reg);
cpu_abort(CPU(cpu), "Unimplemented system register write (%d)\n", reg);
return;
}
}
......
......@@ -10803,7 +10803,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
if (dc->condjmp) {
/* FIXME: This can theoretically happen with self-modifying
code. */
cpu_abort(env, "IO on conditional branch instruction");
cpu_abort(cs, "IO on conditional branch instruction");
}
gen_io_end();
}
......
......@@ -89,7 +89,7 @@ int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
rw, mmu_idx, 0);
if (miss) {
if (cs->exception_index == EXCP_BUSFAULT) {
cpu_abort(env,
cpu_abort(cs,
"CRIS: Illegal recursive bus fault."
"addr=%" VADDR_PRIx " rw=%d\n",
address, rw);
......@@ -130,7 +130,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs)
if (env->dslot) {
/* CRISv10 never takes interrupts while in a delay-slot. */
cpu_abort(env, "CRIS: Interrupt on delay-slot\n");
cpu_abort(cs, "CRIS: Interrupt on delay-slot\n");
}
assert(!(env->pregs[PR_CCS] & PFIX_FLAG));
......@@ -150,7 +150,7 @@ void crisv10_cpu_do_interrupt(CPUState *cs)
break;
case EXCP_BUSFAULT:
cpu_abort(env, "Unhandled busfault");
cpu_abort(cs, "Unhandled busfault");
break;
default:
......
......@@ -129,7 +129,7 @@ static void gen_BUG(DisasContext *dc, const char *file, int line)
{
printf("BUG: pc=%x %s %d\n", dc->pc, file, line);
qemu_log("BUG: pc=%x %s %d\n", dc->pc, file, line);
cpu_abort(dc->env, "%s:%d\n", file, line);
cpu_abort(CPU(cris_env_get_cpu(dc->env)), "%s:%d\n", file, line);
}
static const char *regnames[] =
......@@ -272,7 +272,7 @@ static int cris_fetch(CPUCRISState *env, DisasContext *dc, uint32_t addr,
break;
}
default:
cpu_abort(dc->env, "Invalid fetch size %d\n", size);
cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Invalid fetch size %d\n", size);
break;
}
return r;
......
......@@ -340,7 +340,7 @@ static unsigned int dec10_quick_imm(DisasContext *dc)
default:
LOG_DIS("pc=%x mode=%x quickimm %d r%d r%d\n",
dc->pc, dc->mode, dc->opcode, dc->src, dc->dst);
cpu_abort(dc->env, "Unhandled quickimm\n");
cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled quickimm\n");
break;
}
return 2;
......@@ -651,7 +651,7 @@ static unsigned int dec10_reg(DisasContext *dc)
case 2: tmp = 1; break;
case 1: tmp = 0; break;
default:
cpu_abort(dc->env, "Unhandled BIAP");
cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled BIAP");
break;
}
......@@ -669,7 +669,7 @@ static unsigned int dec10_reg(DisasContext *dc)
default:
LOG_DIS("pc=%x reg %d r%d r%d\n", dc->pc,
dc->opcode, dc->src, dc->dst);
cpu_abort(dc->env, "Unhandled opcode");
cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled opcode");
break;
}
} else {
......@@ -745,7 +745,7 @@ static unsigned int dec10_reg(DisasContext *dc)
default:
LOG_DIS("pc=%x reg %d r%d r%d\n", dc->pc,
dc->opcode, dc->src, dc->dst);
cpu_abort(dc->env, "Unhandled opcode");
cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled opcode");
break;
}
}
......@@ -1105,7 +1105,7 @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc)
default:
LOG_DIS("pc=%x var-ind.%d %d r%d r%d\n",
dc->pc, size, dc->opcode, dc->src, dc->dst);
cpu_abort(dc->env, "Unhandled opcode");
cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled opcode");
break;
}
return insn_len;
......@@ -1198,7 +1198,7 @@ static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc)
break;
default:
LOG_DIS("ERROR pc=%x opcode=%d\n", dc->pc, dc->opcode);
cpu_abort(dc->env, "Unhandled opcode");
cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled opcode");
break;
}
......
......@@ -95,6 +95,7 @@ static inline void load_seg_vm(CPUX86State *env, int seg, int selector)
static inline void get_ss_esp_from_tss(CPUX86State *env, uint32_t *ss_ptr,
uint32_t *esp_ptr, int dpl)
{
X86CPU *cpu = x86_env_get_cpu(env);
int type, index, shift;
#if 0
......@@ -112,11 +113,11 @@ static inline void get_ss_esp_from_tss(CPUX86State *env, uint32_t *ss_ptr,
#endif
if (!(env->tr.flags & DESC_P_MASK)) {
cpu_abort(env, "invalid tss");
cpu_abort(CPU(cpu), "invalid tss");
}
type = (env->tr.flags >> DESC_TYPE_SHIFT) & 0xf;
if ((type & 7) != 1) {
cpu_abort(env, "invalid tss type");
cpu_abort(CPU(cpu), "invalid tss type");
}
shift = type >> 3;
index = (dpl * 4 + 2) << shift;
......@@ -782,6 +783,7 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int,
static inline target_ulong get_rsp_from_tss(CPUX86State *env, int level)
{
X86CPU *cpu = x86_env_get_cpu(env);
int index;
#if 0
......@@ -790,7 +792,7 @@ static inline target_ulong get_rsp_from_tss(CPUX86State *env, int level)
#endif
if (!(env->tr.flags & DESC_P_MASK)) {
cpu_abort(env, "invalid tss");
cpu_abort(CPU(cpu), "invalid tss");
}
index = 8 * level + 4;
if ((index + 7) > env->tr.limit) {
......
......@@ -185,7 +185,7 @@ void lm32_cpu_do_interrupt(CPUState *cs)
log_cpu_state_mask(CPU_LOG_INT, cs, 0);
break;
default:
cpu_abort(env, "unhandled exception type=%d\n",
cpu_abort(cs, "unhandled exception type=%d\n",
cs->exception_index);
break;
}
......
......@@ -132,6 +132,7 @@ void m68k_cpu_init_gdb(M68kCPU *cpu)
void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
int flags;
uint32_t src;
uint32_t dest;
......@@ -204,7 +205,7 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
flags |= CCF_C;
break;
default:
cpu_abort(env, "Bad CC_OP %d", cc_op);
cpu_abort(CPU(cpu), "Bad CC_OP %d", cc_op);
}
env->cc_op = CC_OP_FLAGS;
env->cc_dest = flags;
......@@ -212,6 +213,8 @@ void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op)
void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
switch (reg) {
case 0x02: /* CACR */
env->cacr = val;
......@@ -225,7 +228,7 @@ void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
break;
/* TODO: Implement control registers. */
default:
cpu_abort(env, "Unimplemented control register write 0x%x = 0x%x\n",
cpu_abort(CPU(cpu), "Unimplemented control register write 0x%x = 0x%x\n",
reg, val);
}
}
......
......@@ -461,7 +461,7 @@ void do_m68k_semihosting(CPUM68KState *env, int nr)
#endif
return;
default:
cpu_abort(env, "Unsupported semihosting syscall %d\n", nr);
cpu_abort(CPU(m68k_env_get_cpu(env)), "Unsupported semihosting syscall %d\n", nr);
result = 0;
}
failed:
......
......@@ -881,8 +881,10 @@ DISAS_INSN(undef_fpu)
DISAS_INSN(undef)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
gen_exception(s, s->pc - 2, EXCP_UNSUPPORTED);
cpu_abort(env, "Illegal instruction: %04x @ %08x", insn, s->pc - 2);
cpu_abort(CPU(cpu), "Illegal instruction: %04x @ %08x", insn, s->pc - 2);
}
DISAS_INSN(mulw)
......@@ -2082,12 +2084,14 @@ DISAS_INSN(wddata)
DISAS_INSN(wdebug)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
if (IS_USER(s)) {
gen_exception(s, s->pc - 2, EXCP_PRIVILEGE);
return;
}
/* TODO: Implement wdebug. */
cpu_abort(env, "WDEBUG not implemented");
cpu_abort(CPU(cpu), "WDEBUG not implemented");
}
DISAS_INSN(trap)
......@@ -2461,14 +2465,18 @@ DISAS_INSN(fbcc)
DISAS_INSN(frestore)
{
M68kCPU *cpu = m68k_env_get_cpu(env);
/* TODO: Implement frestore. */
cpu_abort(env, "FRESTORE not implemented");
cpu_abort(CPU(cpu), "FRESTORE not implemented");
}