Commit 6f5b89a0 authored by ths's avatar ths
Browse files

MIPS Userland TLS register emulation, by Daniel Jacobowitz.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
parent c05ac0cd
......@@ -1297,6 +1297,7 @@ static const uint8_t mips_syscall_args[] = {
MIPS_SYS(sys_add_key , 5)
MIPS_SYS(sys_request_key , 4)
MIPS_SYS(sys_keyctl , 5)
MIPS_SYS(sys_set_thread_area, 1)
};
#undef MIPS_SYS
......
......@@ -285,4 +285,4 @@
#define TARGET_NR_add_key (TARGET_NR_Linux + 280)
#define TARGET_NR_request_key (TARGET_NR_Linux + 281)
#define TARGET_NR_keyctl (TARGET_NR_Linux + 282)
#define TARGET_NR_set_thread_area (TARGET_NR_Linux + 283)
......@@ -165,6 +165,9 @@ _syscall3(int,sys_syslog,int,type,char*,bufp,int,len)
#ifdef __NR_exit_group
_syscall1(int,exit_group,int,error_code)
#endif
#if defined(TARGET_NR_set_tid_address) && defined(__NR_set_tid_address)
_syscall1(int,set_tid_address,int *,tidptr)
#endif
extern int personality(int);
extern int flock(int, int);
......@@ -3968,6 +3971,15 @@ long do_syscall(void *cpu_env, int num, long arg1, long arg2, long arg3,
#endif
#ifdef TARGET_NR_set_thread_area
case TARGET_NR_set_thread_area:
#ifdef TARGET_MIPS
((CPUMIPSState *) cpu_env)->tls_value = arg1;
ret = 0;
break;
#else
goto unimplemented_nowarn;
#endif
#endif
#ifdef TARGET_NR_get_thread_area
case TARGET_NR_get_thread_area:
goto unimplemented_nowarn;
#endif
......@@ -3975,10 +3987,17 @@ long do_syscall(void *cpu_env, int num, long arg1, long arg2, long arg3,
case TARGET_NR_getdomainname:
goto unimplemented_nowarn;
#endif
#if defined(TARGET_NR_set_tid_address) && defined(__NR_set_tid_address)
case TARGET_NR_set_tid_address:
ret = get_errno(set_tid_address((int *) arg1));
break;
#endif
default:
unimplemented:
gemu_log("qemu: Unsupported syscall: %d\n", num);
#if defined(TARGET_NR_setxattr) || defined(TARGET_NR_set_thread_area) || defined(TARGET_NR_getdomainname)
#if defined(TARGET_NR_setxattr) || defined(TARGET_NR_get_thread_area) || defined(TARGET_NR_getdomainname)
unimplemented_nowarn:
#endif
ret = -ENOSYS;
......
......@@ -268,6 +268,10 @@ struct CPUMIPSState {
int SYNCI_Step; /* Address step size for SYNCI */
int CCRes; /* Cycle count resolution/divisor */
#if defined(CONFIG_USER_ONLY)
target_ulong tls_value;
#endif
CPU_COMMON
int ram_size;
......
......@@ -2021,6 +2021,13 @@ void op_tlbr (void)
#endif
/* Specials */
#if defined (CONFIG_USER_ONLY)
void op_tls_value (void)
{
T0 = env->tls_value;
}
#endif
void op_pmon (void)
{
CALL_FROM_TB1(do_pmon, PARAM1);
......
......@@ -4728,6 +4728,12 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
case 3:
gen_op_rdhwr_ccres();
break;
#if defined (CONFIG_USER_ONLY)
case 29:
gen_op_tls_value ();
GEN_STORE_TN_REG(rt, T0);
break;
#endif
default: /* Invalid */
MIPS_INVAL("rdhwr");
generate_exception(ctx, EXCP_RI);
......
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