Commit 5a1e3cfc authored by bellard's avatar bellard
Browse files

better halted state support


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1652 c046a42c-6fe2-441c-8c8c-71466251a162
parent d2ac63e0
......@@ -74,7 +74,7 @@ typedef unsigned long ram_addr_t;
#define EXCP_INTERRUPT 0x10000 /* async interruption */
#define EXCP_HLT 0x10001 /* hlt instruction reached */
#define EXCP_DEBUG 0x10002 /* cpu stopped after a breakpoint or singlestep */
#define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) */
#define MAX_BREAKPOINTS 32
#define TB_JMP_CACHE_BITS 12
......@@ -96,7 +96,6 @@ typedef struct CPUTLBEntry {
#define CPU_COMMON \
struct TranslationBlock *current_tb; /* currently executing TB */ \
int cpu_halted; /* TRUE if cpu is halted (sleep mode) */ \
/* soft mmu support */ \
/* in order to avoid passing too many arguments to the memory \
write helpers, we store some rarely used information in the CPU \
......
......@@ -251,6 +251,19 @@ int cpu_exec(CPUState *env1)
TranslationBlock *tb;
uint8_t *tc_ptr;
#if defined(TARGET_I386)
/* handle exit of HALTED state */
if (env1->hflags & HF_HALTED_MASK) {
/* disable halt condition */
if ((env1->interrupt_request & CPU_INTERRUPT_HARD) &&
(env1->eflags & IF_MASK)) {
env1->hflags &= ~HF_HALTED_MASK;
} else {
return EXCP_HALTED;
}
}
#endif
cpu_single_env = env1;
/* first we save global registers */
......
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