Commit 330c483b authored by aurel32's avatar aurel32
Browse files

target-ppc: fix TCGv type in fcmpu/fcmpo


Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6044 c046a42c-6fe2-441c-8c8c-71466251a162
parent 71e991fd
...@@ -2249,7 +2249,7 @@ GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT); ...@@ -2249,7 +2249,7 @@ GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT);
/* fcmpo */ /* fcmpo */
GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT) GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT)
{ {
TCGv crf; TCGv_i32 crf;
if (unlikely(!ctx->fpu_enabled)) { if (unlikely(!ctx->fpu_enabled)) {
gen_exception(ctx, POWERPC_EXCP_FPU); gen_exception(ctx, POWERPC_EXCP_FPU);
return; return;
...@@ -2257,14 +2257,14 @@ GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT) ...@@ -2257,14 +2257,14 @@ GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT)
gen_reset_fpstatus(); gen_reset_fpstatus();
crf = tcg_const_i32(crfD(ctx->opcode)); crf = tcg_const_i32(crfD(ctx->opcode));
gen_helper_fcmpo(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf); gen_helper_fcmpo(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf);
tcg_temp_free(crf); tcg_temp_free_i32(crf);
gen_helper_float_check_status(); gen_helper_float_check_status();
} }
/* fcmpu */ /* fcmpu */
GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT) GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT)
{ {
TCGv crf; TCGv_i32 crf;
if (unlikely(!ctx->fpu_enabled)) { if (unlikely(!ctx->fpu_enabled)) {
gen_exception(ctx, POWERPC_EXCP_FPU); gen_exception(ctx, POWERPC_EXCP_FPU);
return; return;
...@@ -2272,7 +2272,7 @@ GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT) ...@@ -2272,7 +2272,7 @@ GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT)
gen_reset_fpstatus(); gen_reset_fpstatus();
crf = tcg_const_i32(crfD(ctx->opcode)); crf = tcg_const_i32(crfD(ctx->opcode));
gen_helper_fcmpu(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf); gen_helper_fcmpu(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf);
tcg_temp_free(crf); tcg_temp_free_i32(crf);
gen_helper_float_check_status(); gen_helper_float_check_status();
} }
......
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