Commit 2af9ab77 authored by Johan Bengtsson's avatar Johan Bengtsson Committed by Peter Maydell
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target-arm: Add support for PKHxx in thumb2



The PKHxx instructions were not recognized by the thumb2 decoder. The
solution provided in this changeset is identical to the arm-mode
implementation.
Signed-off-by: default avatarJohan Bengtsson <teofrastius@gmail.com>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarNathan Froyd <froydnj@codesourcery.com>
parent 2c90fe2b
...@@ -7601,27 +7601,54 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1) ...@@ -7601,27 +7601,54 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
} }
} }
break; break;
case 5: /* Data processing register constant shift. */ case 5:
if (rn == 15) {
tmp = new_tmp();
tcg_gen_movi_i32(tmp, 0);
} else {
tmp = load_reg(s, rn);
}
tmp2 = load_reg(s, rm);
op = (insn >> 21) & 0xf; op = (insn >> 21) & 0xf;
shiftop = (insn >> 4) & 3; if (op == 6) {
shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c); /* Halfword pack. */
conds = (insn & (1 << 20)) != 0; tmp = load_reg(s, rn);
logic_cc = (conds && thumb2_logic_op(op)); tmp2 = load_reg(s, rm);
gen_arm_shift_im(tmp2, shiftop, shift, logic_cc); shift = ((insn >> 10) & 0x1c) | ((insn >> 6) & 0x3);
if (gen_thumb2_data_op(s, op, conds, 0, tmp, tmp2)) if (insn & (1 << 5)) {
goto illegal_op; /* pkhtb */
dead_tmp(tmp2); if (shift == 0)
if (rd != 15) { shift = 31;
tcg_gen_sari_i32(tmp2, tmp2, shift);
tcg_gen_andi_i32(tmp, tmp, 0xffff0000);
tcg_gen_ext16u_i32(tmp2, tmp2);
} else {
/* pkhbt */
if (shift)
tcg_gen_shli_i32(tmp2, tmp2, shift);
tcg_gen_ext16u_i32(tmp, tmp);
tcg_gen_andi_i32(tmp2, tmp2, 0xffff0000);
}
tcg_gen_or_i32(tmp, tmp, tmp2);
dead_tmp(tmp2);
store_reg(s, rd, tmp); store_reg(s, rd, tmp);
} else { } else {
dead_tmp(tmp); /* Data processing register constant shift. */
if (rn == 15) {
tmp = new_tmp();
tcg_gen_movi_i32(tmp, 0);
} else {
tmp = load_reg(s, rn);
}
tmp2 = load_reg(s, rm);
shiftop = (insn >> 4) & 3;
shift = ((insn >> 6) & 3) | ((insn >> 10) & 0x1c);
conds = (insn & (1 << 20)) != 0;
logic_cc = (conds && thumb2_logic_op(op));
gen_arm_shift_im(tmp2, shiftop, shift, logic_cc);
if (gen_thumb2_data_op(s, op, conds, 0, tmp, tmp2))
goto illegal_op;
dead_tmp(tmp2);
if (rd != 15) {
store_reg(s, rd, tmp);
} else {
dead_tmp(tmp);
}
} }
break; break;
case 13: /* Misc data processing. */ case 13: /* Misc data processing. */
......
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