Commit 17075f10 authored by Aurelien Jarno's avatar Aurelien Jarno
Browse files

target-sh4: add ftrv instruction



Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-column
matrix XMTRX by the 4-dimensional vector FVn.
Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
parent af8c2bde
......@@ -50,5 +50,6 @@ DEF_HELPER_1(fsqrt_DT, i64, i64)
DEF_HELPER_1(ftrc_FT, i32, i32)
DEF_HELPER_1(ftrc_DT, i32, i64)
DEF_HELPER_2(fipr, void, i32, i32)
DEF_HELPER_1(ftrv, void, i32)
#include "def-helper.h"
......@@ -802,3 +802,29 @@ void helper_fipr(uint32_t m, uint32_t n)
env->fregs[bank + n + 3] = r;
}
void helper_ftrv(uint32_t n)
{
int bank_matrix, bank_vector;
int i, j;
float32 r[4];
float32 p;
bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
set_float_exception_flags(0, &env->fp_status);
for (i = 0 ; i < 4 ; i++) {
r[i] = float32_zero;
for (j = 0 ; j < 4 ; j++) {
p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
env->fregs[bank_vector + j],
&env->fp_status);
r[i] = float32_add(r[i], p, &env->fp_status);
}
}
update_fpscr(GETPC());
for (i = 0 ; i < 4 ; i++) {
env->fregs[bank_vector + i] = r[i];
}
}
......@@ -1871,6 +1871,17 @@ static void _decode_opc(DisasContext * ctx)
return;
}
break;
case 0xf0fd: /* ftrv XMTRX,FVn */
CHECK_FPU_ENABLED
if ((ctx->opcode & 0x0300) == 0x0100 &&
(ctx->fpscr & FPSCR_PR) == 0) {
TCGv n;
n = tcg_const_i32((ctx->opcode >> 18) & 3);
gen_helper_ftrv(n);
tcg_temp_free(n);
return;
}
break;
}
#if 0
fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n",
......
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