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  • Vincenzo Maffione's avatar
    e1000: add interrupt mitigation support · e9845f09
    Vincenzo Maffione authored
    This patch partially implements the e1000 interrupt mitigation mechanisms.
    Using a single QEMUTimer, it emulates the ITR register (which is the newer
    mitigation register, recommended by Intel) and approximately emulates
    RADV and TADV registers. TIDV and RDTR register functionalities are not
    emulated (RDTR is only used to validate RADV, according to the e1000 specs).
    
    RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
    mechanism and would need a timer each to be completely emulated. However,
    a single timer has been used in order to reach a good compromise between
    emulation accuracy and simplicity/efficiency.
    
    The implemented mechanism can be enabled/disabled specifying the command
    line e1000-specific boolean parameter "mitigation", e.g.
    
        qemu-system-x86_64 -device e1000,mitigation=on,... ...
    
    For more information, see the Software developer's manual at
    http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
    
    Interrupt mitigation boosts performance when the guest suffers from
    an high interrupt rate (i.e. receiving short UDP packets at high packet
    rate). For some numerical results see the following link
    http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
    
    
    
    Signed-off-by: default avatarVincenzo Maffione <v.maffione@gmail.com>
    Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
    Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
    e9845f09