op_helper.c 73.8 KB
Newer Older
1
#include "exec.h"
blueswir1's avatar
blueswir1 committed
2
#include "host-utils.h"
blueswir1's avatar
blueswir1 committed
3
#include "helper.h"
4 5 6
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
7

bellard's avatar
bellard committed
8
//#define DEBUG_MMU
9
//#define DEBUG_MXCC
blueswir1's avatar
blueswir1 committed
10
//#define DEBUG_UNALIGNED
11
//#define DEBUG_UNASSIGNED
12
//#define DEBUG_ASI
bellard's avatar
bellard committed
13

14 15 16 17
#ifdef DEBUG_MMU
#define DPRINTF_MMU(fmt, args...) \
do { printf("MMU: " fmt , ##args); } while (0)
#else
blueswir1's avatar
blueswir1 committed
18
#define DPRINTF_MMU(fmt, args...) do {} while (0)
19 20 21 22 23 24
#endif

#ifdef DEBUG_MXCC
#define DPRINTF_MXCC(fmt, args...) \
do { printf("MXCC: " fmt , ##args); } while (0)
#else
blueswir1's avatar
blueswir1 committed
25
#define DPRINTF_MXCC(fmt, args...) do {} while (0)
26 27
#endif

28 29 30 31
#ifdef DEBUG_ASI
#define DPRINTF_ASI(fmt, args...) \
do { printf("ASI: " fmt , ##args); } while (0)
#else
blueswir1's avatar
blueswir1 committed
32
#define DPRINTF_ASI(fmt, args...) do {} while (0)
33 34
#endif

35 36 37 38 39 40
#ifdef TARGET_ABI32
#define ABI32_MASK(addr) do { (addr) &= 0xffffffffULL; } while (0)
#else
#define ABI32_MASK(addr) do {} while (0)
#endif

bellard's avatar
bellard committed
41 42 43 44
void raise_exception(int tt)
{
    env->exception_index = tt;
    cpu_loop_exit();
45
}
bellard's avatar
bellard committed
46

blueswir1's avatar
blueswir1 committed
47
void helper_trap(target_ulong nb_trap)
48
{
blueswir1's avatar
blueswir1 committed
49 50 51 52 53 54 55 56 57 58 59 60
    env->exception_index = TT_TRAP + (nb_trap & 0x7f);
    cpu_loop_exit();
}

void helper_trapcc(target_ulong nb_trap, target_ulong do_trap)
{
    if (do_trap) {
        env->exception_index = TT_TRAP + (nb_trap & 0x7f);
        cpu_loop_exit();
    }
}

blueswir1's avatar
blueswir1 committed
61 62
void helper_check_align(target_ulong addr, uint32_t align)
{
63 64 65 66 67
    if (addr & align) {
#ifdef DEBUG_UNALIGNED
    printf("Unaligned access to 0x" TARGET_FMT_lx " from 0x" TARGET_FMT_lx
           "\n", addr, env->pc);
#endif
blueswir1's avatar
blueswir1 committed
68
        raise_exception(TT_UNALIGNED);
69
    }
blueswir1's avatar
blueswir1 committed
70 71
}

72 73 74 75 76 77 78 79 80 81
#define F_HELPER(name, p) void helper_f##name##p(void)

#define F_BINOP(name)                                           \
    F_HELPER(name, s)                                           \
    {                                                           \
        FT0 = float32_ ## name (FT0, FT1, &env->fp_status);     \
    }                                                           \
    F_HELPER(name, d)                                           \
    {                                                           \
        DT0 = float64_ ## name (DT0, DT1, &env->fp_status);     \
blueswir1's avatar
blueswir1 committed
82 83 84 85
    }                                                           \
    F_HELPER(name, q)                                           \
    {                                                           \
        QT0 = float128_ ## name (QT0, QT1, &env->fp_status);    \
86 87 88 89 90 91 92 93 94
    }

F_BINOP(add);
F_BINOP(sub);
F_BINOP(mul);
F_BINOP(div);
#undef F_BINOP

void helper_fsmuld(void)
blueswir1's avatar
blueswir1 committed
95
{
96 97 98 99
    DT0 = float64_mul(float32_to_float64(FT0, &env->fp_status),
                      float32_to_float64(FT1, &env->fp_status),
                      &env->fp_status);
}
blueswir1's avatar
blueswir1 committed
100

blueswir1's avatar
blueswir1 committed
101 102 103 104 105 106 107
void helper_fdmulq(void)
{
    QT0 = float128_mul(float64_to_float128(DT0, &env->fp_status),
                       float64_to_float128(DT1, &env->fp_status),
                       &env->fp_status);
}

108 109 110
F_HELPER(neg, s)
{
    FT0 = float32_chs(FT1);
111 112
}

113 114
#ifdef TARGET_SPARC64
F_HELPER(neg, d)
115
{
116
    DT0 = float64_chs(DT1);
117
}
blueswir1's avatar
blueswir1 committed
118 119 120 121 122 123

F_HELPER(neg, q)
{
    QT0 = float128_chs(QT1);
}
#endif
124 125 126

/* Integer to float conversion.  */
F_HELPER(ito, s)
bellard's avatar
bellard committed
127
{
ths's avatar
ths committed
128
    FT0 = int32_to_float32(*((int32_t *)&FT1), &env->fp_status);
bellard's avatar
bellard committed
129 130
}

131
F_HELPER(ito, d)
bellard's avatar
bellard committed
132
{
ths's avatar
ths committed
133
    DT0 = int32_to_float64(*((int32_t *)&FT1), &env->fp_status);
bellard's avatar
bellard committed
134
}
135

blueswir1's avatar
blueswir1 committed
136 137 138 139 140
F_HELPER(ito, q)
{
    QT0 = int32_to_float128(*((int32_t *)&FT1), &env->fp_status);
}

141
#ifdef TARGET_SPARC64
142
F_HELPER(xto, s)
143 144 145 146
{
    FT0 = int64_to_float32(*((int64_t *)&DT1), &env->fp_status);
}

147
F_HELPER(xto, d)
148 149 150
{
    DT0 = int64_to_float64(*((int64_t *)&DT1), &env->fp_status);
}
blueswir1's avatar
blueswir1 committed
151

blueswir1's avatar
blueswir1 committed
152 153 154 155 156
F_HELPER(xto, q)
{
    QT0 = int64_to_float128(*((int64_t *)&DT1), &env->fp_status);
}
#endif
157 158 159 160 161 162 163 164 165 166 167 168
#undef F_HELPER

/* floating point conversion */
void helper_fdtos(void)
{
    FT0 = float64_to_float32(DT1, &env->fp_status);
}

void helper_fstod(void)
{
    DT0 = float32_to_float64(FT1, &env->fp_status);
}
169

blueswir1's avatar
blueswir1 committed
170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189
void helper_fqtos(void)
{
    FT0 = float128_to_float32(QT1, &env->fp_status);
}

void helper_fstoq(void)
{
    QT0 = float32_to_float128(FT1, &env->fp_status);
}

void helper_fqtod(void)
{
    DT0 = float128_to_float64(QT1, &env->fp_status);
}

void helper_fdtoq(void)
{
    QT0 = float64_to_float128(DT1, &env->fp_status);
}

190 191 192 193 194 195 196 197 198 199 200
/* Float to integer conversion.  */
void helper_fstoi(void)
{
    *((int32_t *)&FT0) = float32_to_int32_round_to_zero(FT1, &env->fp_status);
}

void helper_fdtoi(void)
{
    *((int32_t *)&FT0) = float64_to_int32_round_to_zero(DT1, &env->fp_status);
}

blueswir1's avatar
blueswir1 committed
201 202 203 204 205
void helper_fqtoi(void)
{
    *((int32_t *)&FT0) = float128_to_int32_round_to_zero(QT1, &env->fp_status);
}

206 207 208 209 210 211 212 213 214 215 216
#ifdef TARGET_SPARC64
void helper_fstox(void)
{
    *((int64_t *)&DT0) = float32_to_int64_round_to_zero(FT1, &env->fp_status);
}

void helper_fdtox(void)
{
    *((int64_t *)&DT0) = float64_to_int64_round_to_zero(DT1, &env->fp_status);
}

blueswir1's avatar
blueswir1 committed
217 218 219 220 221
void helper_fqtox(void)
{
    *((int64_t *)&DT0) = float128_to_int64_round_to_zero(QT1, &env->fp_status);
}

222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698
void helper_faligndata(void)
{
    uint64_t tmp;

    tmp = (*((uint64_t *)&DT0)) << ((env->gsr & 7) * 8);
    tmp |= (*((uint64_t *)&DT1)) >> (64 - (env->gsr & 7) * 8);
    *((uint64_t *)&DT0) = tmp;
}

void helper_movl_FT0_0(void)
{
    *((uint32_t *)&FT0) = 0;
}

void helper_movl_DT0_0(void)
{
    *((uint64_t *)&DT0) = 0;
}

void helper_movl_FT0_1(void)
{
    *((uint32_t *)&FT0) = 0xffffffff;
}

void helper_movl_DT0_1(void)
{
    *((uint64_t *)&DT0) = 0xffffffffffffffffULL;
}

void helper_fnot(void)
{
    *(uint64_t *)&DT0 = ~*(uint64_t *)&DT1;
}

void helper_fnots(void)
{
    *(uint32_t *)&FT0 = ~*(uint32_t *)&FT1;
}

void helper_fnor(void)
{
    *(uint64_t *)&DT0 = ~(*(uint64_t *)&DT0 | *(uint64_t *)&DT1);
}

void helper_fnors(void)
{
    *(uint32_t *)&FT0 = ~(*(uint32_t *)&FT0 | *(uint32_t *)&FT1);
}

void helper_for(void)
{
    *(uint64_t *)&DT0 |= *(uint64_t *)&DT1;
}

void helper_fors(void)
{
    *(uint32_t *)&FT0 |= *(uint32_t *)&FT1;
}

void helper_fxor(void)
{
    *(uint64_t *)&DT0 ^= *(uint64_t *)&DT1;
}

void helper_fxors(void)
{
    *(uint32_t *)&FT0 ^= *(uint32_t *)&FT1;
}

void helper_fand(void)
{
    *(uint64_t *)&DT0 &= *(uint64_t *)&DT1;
}

void helper_fands(void)
{
    *(uint32_t *)&FT0 &= *(uint32_t *)&FT1;
}

void helper_fornot(void)
{
    *(uint64_t *)&DT0 = *(uint64_t *)&DT0 | ~*(uint64_t *)&DT1;
}

void helper_fornots(void)
{
    *(uint32_t *)&FT0 = *(uint32_t *)&FT0 | ~*(uint32_t *)&FT1;
}

void helper_fandnot(void)
{
    *(uint64_t *)&DT0 = *(uint64_t *)&DT0 & ~*(uint64_t *)&DT1;
}

void helper_fandnots(void)
{
    *(uint32_t *)&FT0 = *(uint32_t *)&FT0 & ~*(uint32_t *)&FT1;
}

void helper_fnand(void)
{
    *(uint64_t *)&DT0 = ~(*(uint64_t *)&DT0 & *(uint64_t *)&DT1);
}

void helper_fnands(void)
{
    *(uint32_t *)&FT0 = ~(*(uint32_t *)&FT0 & *(uint32_t *)&FT1);
}

void helper_fxnor(void)
{
    *(uint64_t *)&DT0 ^= ~*(uint64_t *)&DT1;
}

void helper_fxnors(void)
{
    *(uint32_t *)&FT0 ^= ~*(uint32_t *)&FT1;
}

#ifdef WORDS_BIGENDIAN
#define VIS_B64(n) b[7 - (n)]
#define VIS_W64(n) w[3 - (n)]
#define VIS_SW64(n) sw[3 - (n)]
#define VIS_L64(n) l[1 - (n)]
#define VIS_B32(n) b[3 - (n)]
#define VIS_W32(n) w[1 - (n)]
#else
#define VIS_B64(n) b[n]
#define VIS_W64(n) w[n]
#define VIS_SW64(n) sw[n]
#define VIS_L64(n) l[n]
#define VIS_B32(n) b[n]
#define VIS_W32(n) w[n]
#endif

typedef union {
    uint8_t b[8];
    uint16_t w[4];
    int16_t sw[4];
    uint32_t l[2];
    float64 d;
} vis64;

typedef union {
    uint8_t b[4];
    uint16_t w[2];
    uint32_t l;
    float32 f;
} vis32;

void helper_fpmerge(void)
{
    vis64 s, d;

    s.d = DT0;
    d.d = DT1;

    // Reverse calculation order to handle overlap
    d.VIS_B64(7) = s.VIS_B64(3);
    d.VIS_B64(6) = d.VIS_B64(3);
    d.VIS_B64(5) = s.VIS_B64(2);
    d.VIS_B64(4) = d.VIS_B64(2);
    d.VIS_B64(3) = s.VIS_B64(1);
    d.VIS_B64(2) = d.VIS_B64(1);
    d.VIS_B64(1) = s.VIS_B64(0);
    //d.VIS_B64(0) = d.VIS_B64(0);

    DT0 = d.d;
}

void helper_fmul8x16(void)
{
    vis64 s, d;
    uint32_t tmp;

    s.d = DT0;
    d.d = DT1;

#define PMUL(r)                                                 \
    tmp = (int32_t)d.VIS_SW64(r) * (int32_t)s.VIS_B64(r);       \
    if ((tmp & 0xff) > 0x7f)                                    \
        tmp += 0x100;                                           \
    d.VIS_W64(r) = tmp >> 8;

    PMUL(0);
    PMUL(1);
    PMUL(2);
    PMUL(3);
#undef PMUL

    DT0 = d.d;
}

void helper_fmul8x16al(void)
{
    vis64 s, d;
    uint32_t tmp;

    s.d = DT0;
    d.d = DT1;

#define PMUL(r)                                                 \
    tmp = (int32_t)d.VIS_SW64(1) * (int32_t)s.VIS_B64(r);       \
    if ((tmp & 0xff) > 0x7f)                                    \
        tmp += 0x100;                                           \
    d.VIS_W64(r) = tmp >> 8;

    PMUL(0);
    PMUL(1);
    PMUL(2);
    PMUL(3);
#undef PMUL

    DT0 = d.d;
}

void helper_fmul8x16au(void)
{
    vis64 s, d;
    uint32_t tmp;

    s.d = DT0;
    d.d = DT1;

#define PMUL(r)                                                 \
    tmp = (int32_t)d.VIS_SW64(0) * (int32_t)s.VIS_B64(r);       \
    if ((tmp & 0xff) > 0x7f)                                    \
        tmp += 0x100;                                           \
    d.VIS_W64(r) = tmp >> 8;

    PMUL(0);
    PMUL(1);
    PMUL(2);
    PMUL(3);
#undef PMUL

    DT0 = d.d;
}

void helper_fmul8sux16(void)
{
    vis64 s, d;
    uint32_t tmp;

    s.d = DT0;
    d.d = DT1;

#define PMUL(r)                                                         \
    tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8);       \
    if ((tmp & 0xff) > 0x7f)                                            \
        tmp += 0x100;                                                   \
    d.VIS_W64(r) = tmp >> 8;

    PMUL(0);
    PMUL(1);
    PMUL(2);
    PMUL(3);
#undef PMUL

    DT0 = d.d;
}

void helper_fmul8ulx16(void)
{
    vis64 s, d;
    uint32_t tmp;

    s.d = DT0;
    d.d = DT1;

#define PMUL(r)                                                         \
    tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2));        \
    if ((tmp & 0xff) > 0x7f)                                            \
        tmp += 0x100;                                                   \
    d.VIS_W64(r) = tmp >> 8;

    PMUL(0);
    PMUL(1);
    PMUL(2);
    PMUL(3);
#undef PMUL

    DT0 = d.d;
}

void helper_fmuld8sux16(void)
{
    vis64 s, d;
    uint32_t tmp;

    s.d = DT0;
    d.d = DT1;

#define PMUL(r)                                                         \
    tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8);       \
    if ((tmp & 0xff) > 0x7f)                                            \
        tmp += 0x100;                                                   \
    d.VIS_L64(r) = tmp;

    // Reverse calculation order to handle overlap
    PMUL(1);
    PMUL(0);
#undef PMUL

    DT0 = d.d;
}

void helper_fmuld8ulx16(void)
{
    vis64 s, d;
    uint32_t tmp;

    s.d = DT0;
    d.d = DT1;

#define PMUL(r)                                                         \
    tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2));        \
    if ((tmp & 0xff) > 0x7f)                                            \
        tmp += 0x100;                                                   \
    d.VIS_L64(r) = tmp;

    // Reverse calculation order to handle overlap
    PMUL(1);
    PMUL(0);
#undef PMUL

    DT0 = d.d;
}

void helper_fexpand(void)
{
    vis32 s;
    vis64 d;

    s.l = (uint32_t)(*(uint64_t *)&DT0 & 0xffffffff);
    d.d = DT1;
    d.VIS_L64(0) = s.VIS_W32(0) << 4;
    d.VIS_L64(1) = s.VIS_W32(1) << 4;
    d.VIS_L64(2) = s.VIS_W32(2) << 4;
    d.VIS_L64(3) = s.VIS_W32(3) << 4;

    DT0 = d.d;
}

#define VIS_HELPER(name, F)                             \
    void name##16(void)                                 \
    {                                                   \
        vis64 s, d;                                     \
                                                        \
        s.d = DT0;                                      \
        d.d = DT1;                                      \
                                                        \
        d.VIS_W64(0) = F(d.VIS_W64(0), s.VIS_W64(0));   \
        d.VIS_W64(1) = F(d.VIS_W64(1), s.VIS_W64(1));   \
        d.VIS_W64(2) = F(d.VIS_W64(2), s.VIS_W64(2));   \
        d.VIS_W64(3) = F(d.VIS_W64(3), s.VIS_W64(3));   \
                                                        \
        DT0 = d.d;                                      \
    }                                                   \
                                                        \
    void name##16s(void)                                \
    {                                                   \
        vis32 s, d;                                     \
                                                        \
        s.f = FT0;                                      \
        d.f = FT1;                                      \
                                                        \
        d.VIS_W32(0) = F(d.VIS_W32(0), s.VIS_W32(0));   \
        d.VIS_W32(1) = F(d.VIS_W32(1), s.VIS_W32(1));   \
                                                        \
        FT0 = d.f;                                      \
    }                                                   \
                                                        \
    void name##32(void)                                 \
    {                                                   \
        vis64 s, d;                                     \
                                                        \
        s.d = DT0;                                      \
        d.d = DT1;                                      \
                                                        \
        d.VIS_L64(0) = F(d.VIS_L64(0), s.VIS_L64(0));   \
        d.VIS_L64(1) = F(d.VIS_L64(1), s.VIS_L64(1));   \
                                                        \
        DT0 = d.d;                                      \
    }                                                   \
                                                        \
    void name##32s(void)                                \
    {                                                   \
        vis32 s, d;                                     \
                                                        \
        s.f = FT0;                                      \
        d.f = FT1;                                      \
                                                        \
        d.l = F(d.l, s.l);                              \
                                                        \
        FT0 = d.f;                                      \
    }

#define FADD(a, b) ((a) + (b))
#define FSUB(a, b) ((a) - (b))
VIS_HELPER(helper_fpadd, FADD)
VIS_HELPER(helper_fpsub, FSUB)

#define VIS_CMPHELPER(name, F)                                        \
    void name##16(void)                                           \
    {                                                             \
        vis64 s, d;                                               \
                                                                  \
        s.d = DT0;                                                \
        d.d = DT1;                                                \
                                                                  \
        d.VIS_W64(0) = F(d.VIS_W64(0), s.VIS_W64(0))? 1: 0;       \
        d.VIS_W64(0) |= F(d.VIS_W64(1), s.VIS_W64(1))? 2: 0;      \
        d.VIS_W64(0) |= F(d.VIS_W64(2), s.VIS_W64(2))? 4: 0;      \
        d.VIS_W64(0) |= F(d.VIS_W64(3), s.VIS_W64(3))? 8: 0;      \
                                                                  \
        DT0 = d.d;                                                \
    }                                                             \
                                                                  \
    void name##32(void)                                           \
    {                                                             \
        vis64 s, d;                                               \
                                                                  \
        s.d = DT0;                                                \
        d.d = DT1;                                                \
                                                                  \
        d.VIS_L64(0) = F(d.VIS_L64(0), s.VIS_L64(0))? 1: 0;       \
        d.VIS_L64(0) |= F(d.VIS_L64(1), s.VIS_L64(1))? 2: 0;      \
                                                                  \
        DT0 = d.d;                                                \
    }

#define FCMPGT(a, b) ((a) > (b))
#define FCMPEQ(a, b) ((a) == (b))
#define FCMPLE(a, b) ((a) <= (b))
#define FCMPNE(a, b) ((a) != (b))

VIS_CMPHELPER(helper_fcmpgt, FCMPGT)
VIS_CMPHELPER(helper_fcmpeq, FCMPEQ)
VIS_CMPHELPER(helper_fcmple, FCMPLE)
VIS_CMPHELPER(helper_fcmpne, FCMPNE)
#endif

void helper_check_ieee_exceptions(void)
{
    target_ulong status;

    status = get_float_exception_flags(&env->fp_status);
    if (status) {
        /* Copy IEEE 754 flags into FSR */
        if (status & float_flag_invalid)
            env->fsr |= FSR_NVC;
        if (status & float_flag_overflow)
            env->fsr |= FSR_OFC;
        if (status & float_flag_underflow)
            env->fsr |= FSR_UFC;
        if (status & float_flag_divbyzero)
            env->fsr |= FSR_DZC;
        if (status & float_flag_inexact)
            env->fsr |= FSR_NXC;

        if ((env->fsr & FSR_CEXC_MASK) & ((env->fsr & FSR_TEM_MASK) >> 23)) {
            /* Unmasked exception, generate a trap */
            env->fsr |= FSR_FTT_IEEE_EXCP;
            raise_exception(TT_FP_EXCP);
        } else {
            /* Accumulate exceptions */
            env->fsr |= (env->fsr & FSR_CEXC_MASK) << 5;
        }
    }
}

void helper_clear_float_exceptions(void)
{
    set_float_exception_flags(0, &env->fp_status);
}

699
void helper_fabss(void)
700
{
bellard's avatar
bellard committed
701
    FT0 = float32_abs(FT1);
702 703
}

bellard's avatar
bellard committed
704
#ifdef TARGET_SPARC64
705
void helper_fabsd(void)
bellard's avatar
bellard committed
706 707 708
{
    DT0 = float64_abs(DT1);
}
blueswir1's avatar
blueswir1 committed
709 710 711 712 713 714

void helper_fabsq(void)
{
    QT0 = float128_abs(QT1);
}
#endif
bellard's avatar
bellard committed
715

716
void helper_fsqrts(void)
717
{
bellard's avatar
bellard committed
718
    FT0 = float32_sqrt(FT1, &env->fp_status);
719 720
}

721
void helper_fsqrtd(void)
722
{
bellard's avatar
bellard committed
723
    DT0 = float64_sqrt(DT1, &env->fp_status);
724 725
}

blueswir1's avatar
blueswir1 committed
726 727 728 729 730
void helper_fsqrtq(void)
{
    QT0 = float128_sqrt(QT1, &env->fp_status);
}

731
#define GEN_FCMP(name, size, reg1, reg2, FS, TRAP)                      \
732
    void glue(helper_, name) (void)                                     \
bellard's avatar
bellard committed
733
    {                                                                   \
blueswir1's avatar
blueswir1 committed
734 735
        target_ulong new_fsr;                                           \
                                                                        \
bellard's avatar
bellard committed
736 737 738
        env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS);                     \
        switch (glue(size, _compare) (reg1, reg2, &env->fp_status)) {   \
        case float_relation_unordered:                                  \
blueswir1's avatar
blueswir1 committed
739
            new_fsr = (FSR_FCC1 | FSR_FCC0) << FS;                      \
740
            if ((env->fsr & FSR_NVM) || TRAP) {                         \
blueswir1's avatar
blueswir1 committed
741
                env->fsr |= new_fsr;                                    \
742 743
                env->fsr |= FSR_NVC;                                    \
                env->fsr |= FSR_FTT_IEEE_EXCP;                          \
bellard's avatar
bellard committed
744 745 746 747 748 749
                raise_exception(TT_FP_EXCP);                            \
            } else {                                                    \
                env->fsr |= FSR_NVA;                                    \
            }                                                           \
            break;                                                      \
        case float_relation_less:                                       \
blueswir1's avatar
blueswir1 committed
750
            new_fsr = FSR_FCC0 << FS;                                   \
bellard's avatar
bellard committed
751 752
            break;                                                      \
        case float_relation_greater:                                    \
blueswir1's avatar
blueswir1 committed
753
            new_fsr = FSR_FCC1 << FS;                                   \
bellard's avatar
bellard committed
754 755
            break;                                                      \
        default:                                                        \
blueswir1's avatar
blueswir1 committed
756
            new_fsr = 0;                                                \
bellard's avatar
bellard committed
757 758
            break;                                                      \
        }                                                               \
blueswir1's avatar
blueswir1 committed
759
        env->fsr |= new_fsr;                                            \
760 761
    }

762 763 764 765 766
GEN_FCMP(fcmps, float32, FT0, FT1, 0, 0);
GEN_FCMP(fcmpd, float64, DT0, DT1, 0, 0);

GEN_FCMP(fcmpes, float32, FT0, FT1, 0, 1);
GEN_FCMP(fcmped, float64, DT0, DT1, 0, 1);
bellard's avatar
bellard committed
767

blueswir1's avatar
blueswir1 committed
768 769 770
GEN_FCMP(fcmpq, float128, QT0, QT1, 0, 0);
GEN_FCMP(fcmpeq, float128, QT0, QT1, 0, 1);

bellard's avatar
bellard committed
771
#ifdef TARGET_SPARC64
772 773
GEN_FCMP(fcmps_fcc1, float32, FT0, FT1, 22, 0);
GEN_FCMP(fcmpd_fcc1, float64, DT0, DT1, 22, 0);
blueswir1's avatar
blueswir1 committed
774
GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0);
775 776 777

GEN_FCMP(fcmps_fcc2, float32, FT0, FT1, 24, 0);
GEN_FCMP(fcmpd_fcc2, float64, DT0, DT1, 24, 0);
blueswir1's avatar
blueswir1 committed
778
GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0);
779 780 781

GEN_FCMP(fcmps_fcc3, float32, FT0, FT1, 26, 0);
GEN_FCMP(fcmpd_fcc3, float64, DT0, DT1, 26, 0);
blueswir1's avatar
blueswir1 committed
782
GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0);
783 784 785

GEN_FCMP(fcmpes_fcc1, float32, FT0, FT1, 22, 1);
GEN_FCMP(fcmped_fcc1, float64, DT0, DT1, 22, 1);
blueswir1's avatar
blueswir1 committed
786
GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1);
bellard's avatar
bellard committed
787

788 789
GEN_FCMP(fcmpes_fcc2, float32, FT0, FT1, 24, 1);
GEN_FCMP(fcmped_fcc2, float64, DT0, DT1, 24, 1);
blueswir1's avatar
blueswir1 committed
790
GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1);
bellard's avatar
bellard committed
791

792 793
GEN_FCMP(fcmpes_fcc3, float32, FT0, FT1, 26, 1);
GEN_FCMP(fcmped_fcc3, float64, DT0, DT1, 26, 1);
blueswir1's avatar
blueswir1 committed
794 795
GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1);
#endif
bellard's avatar
bellard committed
796

blueswir1's avatar
blueswir1 committed
797 798
#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) && \
    defined(DEBUG_MXCC)
799 800 801
static void dump_mxcc(CPUState *env)
{
    printf("mxccdata: %016llx %016llx %016llx %016llx\n",
blueswir1's avatar
blueswir1 committed
802 803
           env->mxccdata[0], env->mxccdata[1],
           env->mxccdata[2], env->mxccdata[3]);
804 805
    printf("mxccregs: %016llx %016llx %016llx %016llx\n"
           "          %016llx %016llx %016llx %016llx\n",
blueswir1's avatar
blueswir1 committed
806 807 808 809
           env->mxccregs[0], env->mxccregs[1],
           env->mxccregs[2], env->mxccregs[3],
           env->mxccregs[4], env->mxccregs[5],
           env->mxccregs[6], env->mxccregs[7]);
810 811 812
}
#endif

blueswir1's avatar
blueswir1 committed
813 814 815 816
#if (defined(TARGET_SPARC64) || !defined(CONFIG_USER_ONLY)) \
    && defined(DEBUG_ASI)
static void dump_asi(const char *txt, target_ulong addr, int asi, int size,
                     uint64_t r1)
817 818 819 820
{
    switch (size)
    {
    case 1:
blueswir1's avatar
blueswir1 committed
821 822
        DPRINTF_ASI("%s "TARGET_FMT_lx " asi 0x%02x = %02" PRIx64 "\n", txt,
                    addr, asi, r1 & 0xff);
823 824
        break;
    case 2:
blueswir1's avatar
blueswir1 committed
825 826
        DPRINTF_ASI("%s "TARGET_FMT_lx " asi 0x%02x = %04" PRIx64 "\n", txt,
                    addr, asi, r1 & 0xffff);
827 828
        break;
    case 4:
blueswir1's avatar
blueswir1 committed
829 830
        DPRINTF_ASI("%s "TARGET_FMT_lx " asi 0x%02x = %08" PRIx64 "\n", txt,
                    addr, asi, r1 & 0xffffffff);
831 832
        break;
    case 8:
blueswir1's avatar
blueswir1 committed
833 834
        DPRINTF_ASI("%s "TARGET_FMT_lx " asi 0x%02x = %016" PRIx64 "\n", txt,
                    addr, asi, r1);
835 836 837 838 839
        break;
    }
}
#endif

blueswir1's avatar
blueswir1 committed
840 841 842
#ifndef TARGET_SPARC64
#ifndef CONFIG_USER_ONLY
uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign)
843
{
blueswir1's avatar
blueswir1 committed
844
    uint64_t ret = 0;
845
#if defined(DEBUG_MXCC) || defined(DEBUG_ASI)
blueswir1's avatar
blueswir1 committed
846
    uint32_t last_addr = addr;
847
#endif
bellard's avatar
bellard committed
848

849
    helper_check_align(addr, size - 1);
bellard's avatar
bellard committed
850
    switch (asi) {
851
    case 2: /* SuperSparc MXCC registers */
blueswir1's avatar
blueswir1 committed
852
        switch (addr) {
853
        case 0x01c00a00: /* MXCC control register */
blueswir1's avatar
blueswir1 committed
854 855 856
            if (size == 8)
                ret = env->mxccregs[3];
            else
blueswir1's avatar
blueswir1 committed
857 858
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
859 860 861 862 863
            break;
        case 0x01c00a04: /* MXCC control register */
            if (size == 4)
                ret = env->mxccregs[3];
            else
blueswir1's avatar
blueswir1 committed
864 865
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
866
            break;
867 868
        case 0x01c00c00: /* Module reset register */
            if (size == 8) {
blueswir1's avatar
blueswir1 committed
869
                ret = env->mxccregs[5];
870 871
                // should we do something here?
            } else
blueswir1's avatar
blueswir1 committed
872 873
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
874
            break;
875
        case 0x01c00f00: /* MBus port address register */
blueswir1's avatar
blueswir1 committed
876 877 878
            if (size == 8)
                ret = env->mxccregs[7];
            else
blueswir1's avatar
blueswir1 committed
879 880
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
881 882
            break;
        default:
blueswir1's avatar
blueswir1 committed
883 884
            DPRINTF_MXCC("%08x: unimplemented address, size: %d\n", addr,
                         size);
885 886
            break;
        }
blueswir1's avatar
blueswir1 committed
887 888
        DPRINTF_MXCC("asi = %d, size = %d, sign = %d, "
                     "addr = %08x -> ret = %08x,"
blueswir1's avatar
blueswir1 committed
889
                     "addr = %08x\n", asi, size, sign, last_addr, ret, addr);
890 891 892
#ifdef DEBUG_MXCC
        dump_mxcc(env);
#endif
893
        break;
894
    case 3: /* MMU probe */
blueswir1's avatar
blueswir1 committed
895 896 897
        {
            int mmulev;

blueswir1's avatar
blueswir1 committed
898
            mmulev = (addr >> 8) & 15;
blueswir1's avatar
blueswir1 committed
899 900
            if (mmulev > 4)
                ret = 0;
blueswir1's avatar
blueswir1 committed
901 902 903 904
            else
                ret = mmu_probe(env, addr, mmulev);
            DPRINTF_MMU("mmu_probe: 0x%08x (lev %d) -> 0x%08" PRIx64 "\n",
                        addr, mmulev, ret);
blueswir1's avatar
blueswir1 committed
905 906
        }
        break;
907
    case 4: /* read MMU regs */
blueswir1's avatar
blueswir1 committed
908
        {
blueswir1's avatar
blueswir1 committed
909
            int reg = (addr >> 8) & 0x1f;
910

blueswir1's avatar
blueswir1 committed
911 912
            ret = env->mmuregs[reg];
            if (reg == 3) /* Fault status cleared on read */
blueswir1's avatar
blueswir1 committed
913 914 915 916 917
                env->mmuregs[3] = 0;
            else if (reg == 0x13) /* Fault status read */
                ret = env->mmuregs[3];
            else if (reg == 0x14) /* Fault address read */
                ret = env->mmuregs[4];
blueswir1's avatar
blueswir1 committed
918
            DPRINTF_MMU("mmu_read: reg[%d] = 0x%08" PRIx64 "\n", reg, ret);
blueswir1's avatar
blueswir1 committed
919 920
        }
        break;
blueswir1's avatar
blueswir1 committed
921 922 923 924
    case 5: // Turbosparc ITLB Diagnostic
    case 6: // Turbosparc DTLB Diagnostic
    case 7: // Turbosparc IOTLB Diagnostic
        break;
925 926 927
    case 9: /* Supervisor code access */
        switch(size) {
        case 1:
blueswir1's avatar
blueswir1 committed
928
            ret = ldub_code(addr);
929 930
            break;
        case 2:
931
            ret = lduw_code(addr);
932 933 934
            break;
        default:
        case 4:
935
            ret = ldl_code(addr);
936 937
            break;
        case 8:
938
            ret = ldq_code(addr);
939 940 941
            break;
        }
        break;
942 943 944
    case 0xa: /* User data access */
        switch(size) {
        case 1:
blueswir1's avatar
blueswir1 committed
945
            ret = ldub_user(addr);
946 947
            break;
        case 2:
948
            ret = lduw_user(addr);
949 950 951
            break;
        default:
        case 4:
952
            ret = ldl_user(addr);
953 954
            break;
        case 8:
955
            ret = ldq_user(addr);
956 957 958 959 960 961
            break;
        }
        break;
    case 0xb: /* Supervisor data access */
        switch(size) {
        case 1:
blueswir1's avatar
blueswir1 committed
962
            ret = ldub_kernel(addr);
963 964
            break;
        case 2:
965
            ret = lduw_kernel(addr);
966 967 968
            break;
        default:
        case 4:
969
            ret = ldl_kernel(addr);
970 971
            break;
        case 8:
972
            ret = ldq_kernel(addr);
973 974 975
            break;
        }
        break;
976 977 978 979 980 981
    case 0xc: /* I-cache tag */
    case 0xd: /* I-cache data */
    case 0xe: /* D-cache tag */
    case 0xf: /* D-cache data */
        break;
    case 0x20: /* MMU passthrough */
bellard's avatar
bellard committed
982 983
        switch(size) {
        case 1:
blueswir1's avatar
blueswir1 committed
984
            ret = ldub_phys(addr);
bellard's avatar
bellard committed
985 986
            break;
        case 2:
987
            ret = lduw_phys(addr);
bellard's avatar
bellard committed
988 989 990
            break;
        default:
        case 4:
991
            ret = ldl_phys(addr);
bellard's avatar
bellard committed
992
            break;
bellard's avatar
bellard committed
993
        case 8:
994
            ret = ldq_phys(addr);
blueswir1's avatar
blueswir1 committed
995
            break;
bellard's avatar
bellard committed
996
        }
blueswir1's avatar
blueswir1 committed
997
        break;
998
    case 0x21 ... 0x2f: /* MMU passthrough, 0x100000000 to 0xfffffffff */
999 1000
        switch(size) {
        case 1:
blueswir1's avatar
blueswir1 committed
1001
            ret = ldub_phys((target_phys_addr_t)addr
1002 1003 1004
                            | ((target_phys_addr_t)(asi & 0xf) << 32));
            break;
        case 2:
1005
            ret = lduw_phys((target_phys_addr_t)addr
1006 1007 1008 1009
                            | ((target_phys_addr_t)(asi & 0xf) << 32));
            break;
        default:
        case 4:
1010
            ret = ldl_phys((target_phys_addr_t)addr
1011 1012 1013
                           | ((target_phys_addr_t)(asi & 0xf) << 32));
            break;
        case 8:
1014
            ret = ldq_phys((target_phys_addr_t)addr
1015
                           | ((target_phys_addr_t)(asi & 0xf) << 32));
blueswir1's avatar
blueswir1 committed
1016
            break;
1017
        }
blueswir1's avatar
blueswir1 committed
1018
        break;
blueswir1's avatar
blueswir1 committed
1019 1020 1021
    case 0x30: // Turbosparc secondary cache diagnostic
    case 0x31: // Turbosparc RAM snoop
    case 0x32: // Turbosparc page table descriptor diagnostic
blueswir1's avatar
blueswir1 committed
1022 1023 1024
    case 0x39: /* data cache diagnostic register */
        ret = 0;
        break;
blueswir1's avatar
blueswir1 committed
1025
    case 8: /* User code access, XXX */
1026
    default:
blueswir1's avatar
blueswir1 committed
1027
        do_unassigned_access(addr, 0, 0, asi);
blueswir1's avatar
blueswir1 committed
1028 1029
        ret = 0;
        break;
1030
    }
1031 1032 1033
    if (sign) {
        switch(size) {
        case 1:
blueswir1's avatar
blueswir1 committed
1034
            ret = (int8_t) ret;
blueswir1's avatar
blueswir1 committed
1035
            break;
1036
        case 2:
blueswir1's avatar
blueswir1 committed
1037 1038 1039 1040
            ret = (int16_t) ret;
            break;
        case 4:
            ret = (int32_t) ret;
blueswir1's avatar
blueswir1 committed
1041
            break;
1042 1043 1044 1045
        default:
            break;
        }
    }
1046
#ifdef DEBUG_ASI
blueswir1's avatar
blueswir1 committed
1047
    dump_asi("read ", last_addr, asi, size, ret);
1048
#endif
blueswir1's avatar
blueswir1 committed
1049
    return ret;
1050 1051
}

blueswir1's avatar
blueswir1 committed
1052
void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size)
1053
{
1054
    helper_check_align(addr, size - 1);
1055
    switch(asi) {
1056
    case 2: /* SuperSparc MXCC registers */
blueswir1's avatar
blueswir1 committed
1057
        switch (addr) {
1058 1059
        case 0x01c00000: /* MXCC stream data register 0 */
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1060
                env->mxccdata[0] = val;
1061
            else
blueswir1's avatar
blueswir1 committed
1062 1063
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
1064 1065 1066
            break;
        case 0x01c00008: /* MXCC stream data register 1 */
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1067
                env->mxccdata[1] = val;
1068
            else
blueswir1's avatar
blueswir1 committed
1069 1070
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
1071 1072 1073
            break;
        case 0x01c00010: /* MXCC stream data register 2 */
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1074
                env->mxccdata[2] = val;
1075
            else
blueswir1's avatar
blueswir1 committed
1076 1077
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
1078 1079 1080
            break;
        case 0x01c00018: /* MXCC stream data register 3 */
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1081
                env->mxccdata[3] = val;
1082
            else
blueswir1's avatar
blueswir1 committed
1083 1084
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
1085 1086 1087
            break;
        case 0x01c00100: /* MXCC stream source */
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1088
                env->mxccregs[0] = val;
1089
            else
blueswir1's avatar
blueswir1 committed
1090 1091 1092 1093 1094 1095 1096 1097 1098 1099
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
            env->mxccdata[0] = ldq_phys((env->mxccregs[0] & 0xffffffffULL) +
                                        0);
            env->mxccdata[1] = ldq_phys((env->mxccregs[0] & 0xffffffffULL) +
                                        8);
            env->mxccdata[2] = ldq_phys((env->mxccregs[0] & 0xffffffffULL) +
                                        16);
            env->mxccdata[3] = ldq_phys((env->mxccregs[0] & 0xffffffffULL) +
                                        24);
1100 1101 1102
            break;
        case 0x01c00200: /* MXCC stream destination */
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1103
                env->mxccregs[1] = val;
1104
            else
blueswir1's avatar
blueswir1 committed
1105 1106 1107 1108 1109 1110 1111 1112 1113 1114
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
            stq_phys((env->mxccregs[1] & 0xffffffffULL) +  0,
                     env->mxccdata[0]);
            stq_phys((env->mxccregs[1] & 0xffffffffULL) +  8,
                     env->mxccdata[1]);
            stq_phys((env->mxccregs[1] & 0xffffffffULL) + 16,
                     env->mxccdata[2]);
            stq_phys((env->mxccregs[1] & 0xffffffffULL) + 24,
                     env->mxccdata[3]);
1115 1116 1117
            break;
        case 0x01c00a00: /* MXCC control register */
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1118
                env->mxccregs[3] = val;
1119
            else
blueswir1's avatar
blueswir1 committed
1120 1121
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
1122 1123 1124
            break;
        case 0x01c00a04: /* MXCC control register */
            if (size == 4)
blueswir1's avatar
blueswir1 committed
1125 1126
                env->mxccregs[3] = (env->mxccregs[0xa] & 0xffffffff00000000ULL)
                    | val;
1127
            else
blueswir1's avatar
blueswir1 committed
1128 1129
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
1130 1131
            break;
        case 0x01c00e00: /* MXCC error register  */
1132
            // writing a 1 bit clears the error
1133
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1134
                env->mxccregs[6] &= ~val;
1135
            else
blueswir1's avatar
blueswir1 committed
1136 1137
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
1138 1139 1140
            break;
        case 0x01c00f00: /* MBus port address register */
            if (size == 8)
blueswir1's avatar
blueswir1 committed
1141
                env->mxccregs[7] = val;
1142
            else
blueswir1's avatar
blueswir1 committed
1143 1144
                DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
                             size);
1145 1146
            break;
        default:
blueswir1's avatar
blueswir1 committed
1147