1. 27 May, 2016 1 commit
    • Arnd Bergmann's avatar
      remove lots of IS_ERR_VALUE abuses · 287980e4
      Arnd Bergmann authored
      Most users of IS_ERR_VALUE() in the kernel are wrong, as they
      pass an 'int' into a function that takes an 'unsigned long'
      argument. This happens to work because the type is sign-extended
      on 64-bit architectures before it gets converted into an
      unsigned type.
      However, anything that passes an 'unsigned short' or 'unsigned int'
      argument into IS_ERR_VALUE() is guaranteed to be broken, as are
      8-bit integers and types that are wider than 'unsigned long'.
      Andrzej Hajda has already fixed a lot of the worst abusers that
      were causing actual bugs, but it would be nice to prevent any
      users that are not passing 'unsigned long' arguments.
      This patch changes all users of IS_ERR_VALUE() that I could find
      on 32-bit ARM randconfig builds and x86 allmodconfig. For the
      moment, this doesn't change the definition of IS_ERR_VALUE()
      because there are probably still architecture specific users
      Almost all the warnings I got are for files that are better off
      using 'if (err)' or 'if (err < 0)'.
      The only legitimate user I could find that we get a warning for
      is the (32-bit only) freescale fman driver, so I did not remove
      the IS_ERR_VALUE() there but changed the type to 'unsigned long'.
      For 9pfs, I just worked around one user whose calling conventions
      are so obscure that I did not dare change the behavior.
      I was using this definition for testing:
       #define IS_ERR_VALUE(x) ((unsigned long*)NULL == (typeof (x)*)NULL && \
             unlikely((unsigned long long)(x) >= (unsigned long long)(typeof(x))-MAX_ERRNO))
      which ends up making all 16-bit or wider types work correctly with
      the most plausible interpretation of what IS_ERR_VALUE() was supposed
      to return according to its users, but also causes a compile-time
      warning for any users that do not pass an 'unsigned long' argument.
      I suggested this approach earlier this year, but back then we ended
      up deciding to just fix the users that are obviously broken. After
      the initial warning that caused me to get involved in the discussion
      (fs/gfs2/dir.c) showed up again in the mainline kernel, Linus
      asked me to send the whole thing again.
      [ Updated the 9p parts as per Al Viro  - Linus ]
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Cc: Andrzej Hajda <a.hajda@samsung.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Link: https://lkml.org/lkml/2016/1/7/363
      Link: https://lkml.org/lkml/2016/5/27/486
      Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> # For nvmem part
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
  2. 16 Sep, 2015 2 commits
    • Rob Herring's avatar
      irqchip: Kill off set_irq_flags usage · d17cab44
      Rob Herring authored
      set_irq_flags is ARM specific with custom flags which have genirq
      equivalents. Convert drivers to use the genirq interfaces directly, so we
      can kill off set_irq_flags. The translation of flags is as follows:
      For IRQs managed by an irqdomain, the irqdomain core code handles clearing
      and setting IRQ_NOREQUEST already, so there is no need to do this in
      .map() functions and we can simply remove the set_irq_flags calls. Some
      users also modify IRQ_NOPROBE and this has been maintained although it
      is not clear that is really needed. There appears to be a great deal of
      blind copy and paste of this code.
      Signed-off-by: default avatarRob Herring <robh@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Kukjin Kim <kgene@kernel.org>
      Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Lee Jones <lee@kernel.org>
      Cc: Alexander Shiyan <shc_work@mail.ru>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: linux-rpi-kernel@lists.infradead.org
      Cc: linux-samsung-soc@vger.kernel.org
      Link: http://lkml.kernel.org/r/1440889285-5637-3-git-send-email-robh@kernel.orgSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    • Thomas Gleixner's avatar
      genirq: Remove irq argument from irq flow handlers · bd0b9ac4
      Thomas Gleixner authored
      Most interrupt flow handlers do not use the irq argument. Those few
      which use it can retrieve the irq number from the irq descriptor.
      Remove the argument.
      Search and replace was done with coccinelle and some extra helper
      scripts around it. Thanks to Julia for her help!
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: Julia Lawall <Julia.Lawall@lip6.fr>
      Cc: Jiang Liu <jiang.liu@linux.intel.com>
  3. 17 Jul, 2015 1 commit
  4. 16 Jul, 2015 1 commit
  5. 11 Jul, 2015 2 commits
  6. 18 Jun, 2015 1 commit
  7. 24 Jun, 2014 12 commits
  8. 21 Jun, 2014 1 commit
  9. 18 Apr, 2014 1 commit
  10. 12 Jan, 2013 1 commit
  11. 26 Nov, 2012 2 commits
    • Viresh Kumar's avatar
      ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/ · df1590d9
      Viresh Kumar authored
      This patch moves shirq interrupt controllers driver and header file out of
      plat-spear directory. It is moved to drivers/irqchip/ directory.
      Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
    • Shiraz Hashim's avatar
      ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT · 80515a5a
      Shiraz Hashim authored
      SPEAr3xx architecture includes shared/multiplexed irqs for certain set
      of devices. The multiplexor provides a single interrupt to parent
      interrupt controller (VIC) on behalf of a group of devices.
      There can be multiple groups available on SPEAr3xx variants but not
      exceeding 4. The number of devices in a group can differ, further they
      may share same set of status/mask registers spanning across different
      bit masks. Also in some cases the group may not have enable or other
      registers. This makes software little complex.
      Present implementation was non-DT and had few complex data structures to
      decipher banks, number of irqs supported, mask and registers involved.
      This patch simplifies the overall design and convert it in to DT.  It
      also removes all registration from individual SoC files and bring them
      in to common shirq.c.
      Also updated the corresponding documentation for DT binding of shirq.
      Signed-off-by: default avatarShiraz Hashim <shiraz.hashim@st.com>
      Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
  12. 20 Jun, 2012 1 commit
  13. 29 Mar, 2011 2 commits
  14. 13 Jan, 2011 1 commit
  15. 04 May, 2010 1 commit