1. 13 Jul, 2016 1 commit
  2. 12 Jul, 2016 2 commits
    • Jean Delvare's avatar
      clk: oxnas: Add hardware dependencies · 821f9946
      Jean Delvare authored
      The clk-oxnas driver is specific to its architecture, so do not
      propose it on other architectures, unless build-testing.
      Signed-off-by: default avatarJean Delvare <jdelvare@suse.de>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Acked-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/20160707091844.196a7930@endymion
      821f9946
    • Stefan Agner's avatar
      clk: imx7d: do not set parent of ethernet time/ref clocks · 5e33ebff
      Stefan Agner authored
      All device trees currently in mainline specify the time clock parent
      using the assigned-clocks/assigned-clock-parents method, there is no
      need to statically assign the parent in the core clock driver.
      Also all current boards provide an Ethernet reference clock for the
      PHY externally, hence configuring the internal PHY reference clock.
      
      Furthermore, and the actual driver of this patch, specify ethernet
      related parents at that early point in boot leads to a warning:
      bad: scheduling from the idle thread!
      
      The reason for the warning is that setting the parent enables the ENET
      PLL since we are using CLK_OPS_PARENT_ENABLE. Enabling the ENET PLL can
      cause clk_pllv3_wait_lock to sleep. See also:
      commit fc8726a2 ("clk: core: support clocks which requires parents
      enable (part 2)").
      
      Note that setting the ENET AXI root clock parent also requires ENET
      PLL to be enabled. However, U-Boot typically leaves the ENET PLL on,
      hence when the framework sets the parent of the first clock, it does
      not need to wait for the PLL to come up. But because there is currently
      no user of that clock, the PLL gets disabled after setting the parent.
      Therefore, subsequent reparenting calls of any clock which somehow rely
      on the ENET PLL, need to reenable the ENET PLL which leads to a sleep.
      Removing those subsequent reparenting calls works around this issue.
      
      Also remove comments. The code is really verbose enough.
      Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
      Tested-by: default avatarFabio Estevam <festevam@gmail.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/20160703174813.13970-1-stefan@agner.ch
      5e33ebff
  3. 11 Jul, 2016 2 commits
  4. 08 Jul, 2016 14 commits
  5. 07 Jul, 2016 1 commit
  6. 06 Jul, 2016 8 commits
    • Christophe JAILLET's avatar
      clk: stm32f4: fix error handling · 334e125b
      Christophe JAILLET authored
      This is likely that checking 'clks[idx]' instead of 'clks[n]' is
      expected here.
      Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/1467526003-13318-1-git-send-email-christophe.jaillet@wanadoo.fr
      334e125b
    • Sylvain Lemieux's avatar
      clk: lpc32xx: allow peripheral clock selection in device tree · 054e2730
      Sylvain Lemieux authored
      This patch add the support to select the peripheral clock (PERIPH)
      as a parent clock source using the "assigned-clock-parents"
      parameter in the device tree.
      Signed-off-by: default avatarSylvain Lemieux <slemieux@tycoint.com>
      Acked-by: default avatarVladimir Zapolskiy <vz@mleia.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/1464982475-24738-1-git-send-email-slemieux.tyco@gmail.com
      054e2730
    • Paul Gortmaker's avatar
      clk: sunxi: make clk-* explicitly non-modular · 439a36d7
      Paul Gortmaker authored
      We have the following file --> Kconfig mapping:
      
      sunxi/clk-factors.c              obj-y
      sunxi/clk-sun6i-apb0-gates.c     CONFIG_MFD_SUN6I_PRCM (bool)
      sunxi/clk-sun6i-apb0.c           CONFIG_MFD_SUN6I_PRCM
      sunxi/clk-sun6i-ar100.c          CONFIG_MFD_SUN6I_PRCM
      sunxi/clk-sun8i-apb0.c           CONFIG_MFD_SUN6I_PRCM
      sunxi/clk-sun9i-mmc.c            obj-y
      
      Hence none of these are being built as a module by anyone.
      
      Lets remove the modular code that is essentially orphaned, so that
      when reading the drivers there is no doubt they are builtin-only.  All
      drivers get mostly the same changes, so they are handled in batch.
      
      Changes are (1) convert to builtin_platform_register, (2) use the
      init.h header, (3) delete the MODULE_LICENCE/MODULE_AUTHOR and
      associated tags, and (4) delete any ".remove" functions.
      
      There was a stray module.h in a file not using any init.h or
      module.h stuff, so we simply removed that one.
      
      In two cases, we explicitly disallow a driver unbind, since that
      doesn't have a sensible use case anyway, and it allows us to drop
      the ".remove" code for non-modular drivers.
      
      Since module_platform_driver() uses the same init level priority as
      builtin_platform_driver() the init ordering remains unchanged with
      this commit.
      
      We delete the MODULE_LICENSE etc. tags since all that information
      is already contained at the top of each file in the comments.
      Acked-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
      Cc: Chen-Yu Tsai <wens@csie.org>
      Cc: "Emilio López" <emilio@elopez.com.ar>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
      Cc: linux-clk@vger.kernel.org
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/20160704211220.5685-9-paul.gortmaker@windriver.com
      439a36d7
    • Paul Gortmaker's avatar
      clk: oxnas: make it explicitly non-modular · 80c6397c
      Paul Gortmaker authored
      The Kconfig currently controlling compilation of this code is:
      
      drivers/clk/Kconfig:config COMMON_CLK_OXNAS
      drivers/clk/Kconfig:    bool "Clock driver for the OXNAS SoC Family"
      
      ...meaning that it currently is not being built as a module by anyone.
      
      Lets remove the modular code that is essentially orphaned, so that
      when reading the driver there is no doubt it is builtin-only.
      
      We explicitly disallow a driver unbind, since that doesn't have a
      sensible use case anyway, and it allows us to drop the ".remove"
      code for non-modular drivers.
      
      Since module_platform_driver() uses the same init level priority as
      builtin_platform_driver() the init ordering remains unchanged with
      this commit.
      
      Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
      
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Acked-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
      Cc: linux-clk@vger.kernel.org
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/20160704211220.5685-6-paul.gortmaker@windriver.com
      80c6397c
    • Wadim Egorov's avatar
      clk: Kconfig: Name RK818 in Kconfig for COMMON_CLK_RK808 · cb98fd5d
      Wadim Egorov authored
      The RK808 and RK818 PMICs are using a similar register map.
      We can reuse the clk driver for the RK818 PMIC. So let's add
      the RK818 in the Kconfig description.
      Signed-off-by: default avatarWadim Egorov <w.egorov@phytec.de>
      Acked-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/1464850228-17244-4-git-send-email-w.egorov@phytec.de
      cb98fd5d
    • Xinliang Liu's avatar
      clk: hi6220: Change syspll and media_syspll clk to 1.19GHz · c6e80ace
      Xinliang Liu authored
      In the bootloader of HiKey/96boards, syspll and media_syspll clk
      was initialized to 1.19GHz. So, here changes it in kernel accordingly.
      
      1.19GHz was chosen over 1.2GHz because at 1.19GHz we get more precise
      HDMI pixel clock (1.19G/16 = 74.4MHz) for 1280x720p@60Hz HDMI
      (74.25MHz required by standards). Closer pixel clock means better
      compatibility to HDMI monitors.
      Signed-off-by: default avatarGuodong Xu <guodong.xu@linaro.org>
      Signed-off-by: default avatarXinliang Liu <xinliang.liu@linaro.org>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/1467189955-21694-1-git-send-email-guodong.xu@linaro.org
      c6e80ace
    • Paul Gortmaker's avatar
      clk: meson: make gxbb explicitly non-modular · 1f501d63
      Paul Gortmaker authored
      The Kconfig currently controlling compilation of this code is:
      
      drivers/clk/meson/Kconfig:config COMMON_CLK_GXBB
      drivers/clk/meson/Kconfig:      bool
      
      ...meaning that it currently is not being built as a module by anyone.
      
      Lets remove the modular code that is essentially orphaned, so that
      when reading the driver there is no doubt it is builtin-only.
      
      Since module_init translates to device_initcall in the non-modular
      case, the init ordering remains unchanged with this commit.
      
      Also note that MODULE_DEVICE_TABLE and ALIAS are no-op for non-modules.
      
      We also delete the MODULE_LICENSE tag etc. since all that information
      was (or is now) contained at the top of the file in the comments.
      
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Carlo Caione <carlo@caione.org>
      Cc: Kevin Hilman <khilman@baylibre.com>
      Cc: linux-clk@vger.kernel.org
      Cc: linux-amlogic@lists.infradead.org
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/20160704211220.5685-3-paul.gortmaker@windriver.com
      1f501d63
    • Paul Gortmaker's avatar
      clk: meson8b: make it explicitly non-modular · a718ce38
      Paul Gortmaker authored
      The Kconfig currently controlling compilation of this code is:
      
      drivers/clk/meson/Kconfig:config COMMON_CLK_MESON8B
      drivers/clk/meson/Kconfig:      bool
      
      ...meaning that it currently is not being built as a module by anyone.
      However a recent commit added a bunch of modular boilerplate to this
      driver.
      
      Lets remove the modular code that is essentially orphaned, so that
      when reading the driver there is no doubt it is builtin-only.
      
      Since module_init translates to device_initcall in the non-modular
      case, the init ordering remains unchanged with this commit.
      
      Also note that MODULE DEVICE_TABLE/ALIAS are no-op when non-modular.
      
      We also delete the MODULE_LICENSE tag etc. since all that information
      was (or is now) contained at the top of the file in the comments.
      
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Carlo Caione <carlo@caione.org>
      Cc: Kevin Hilman <khilman@baylibre.com>
      Cc: linux-clk@vger.kernel.org
      Cc: linux-amlogic@lists.infradead.org
      Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
      Link: lkml.kernel.org/r/20160704211220.5685-2-paul.gortmaker@windriver.com
      a718ce38
  7. 01 Jul, 2016 10 commits
    • Linus Walleij's avatar
      clk: qcom: add EBI2 clocks to the MSM8660 GCC · cdbf85c1
      Linus Walleij authored
      This adds the EBI2 2X and EBI2 clocks to the MSM8660/APQ8060
      GCC. This is necessary to enable clocking of the external bus
      interface so that peripherals on it can be mounted. These two
      clocks are simple gated branch clocks.
      
      In the vendor tree clock-8x60, these clocks have some kind of
      dependency, the EBI2 clock has .depends = &ebi2_2x_clk.c,
      what this means is undocumented, it doesn't seem like there
      is a parent/child relationship, so the solution I chose was to
      just have the EBI2 driver get and enable both clocks.
      
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      cdbf85c1
    • Dong Aisheng's avatar
      clk: imx7d: only enable minimum required clocks · e8e628fb
      Dong Aisheng authored
      Formerly clk core does not support imx7d clock type well that all
      its clock operations requires the parent clock on.
      Therefore we enabled all clocks by default in clock driver
      initialization for other module clocks operate well.
      
      After patch 'clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLE',
      clk core can handle such clock type well, so we don't have to enable
      them all by default anymore. Instead, we only enable a minimum required
      set of clocks.
      
      Cc: Michael Turquette <mturquette@baylibre.com>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Shawn Guo <shawnguo@kernel.org>
      Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      e8e628fb
    • Dong Aisheng's avatar
      clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLE · cbeac74a
      Dong Aisheng authored
      i.MX7D requires all clocks operations including enable/disable,
      rate change and re-parent with its parent clock on.
      Changing to the correct APIs to tell clk core such requirement.
      
      Cc: Michael Turquette <mturquette@baylibre.com>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Shawn Guo <shawnguo@kernel.org>
      Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      cbeac74a
    • Dong Aisheng's avatar
      clk: imx: add clk api for supporting CLK_OPS_PARENT_ENABLE clocks · 39c29498
      Dong Aisheng authored
      IMX SoCs like i.MX7D requires using CLK_OPS_PARENT_ENABLE flags,
      adding the corresponding clock APIs variants for easily to use.
      
      Cc: Michael Turquette <mturquette@baylibre.com>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Shawn Guo <shawnguo@kernel.org>
      Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      39c29498
    • Dong Aisheng's avatar
      clk: imx: re-order and concentrate the same type of clk api · 5afc9941
      Dong Aisheng authored
      Re-order and concentrate the same type of clk api for better
      code maintenance.
      
      Cc: Shawn Guo <shawnguo@kernel.org>
      Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      5afc9941
    • Dong Aisheng's avatar
      clk: core: support clocks which requires parents enable (part 2) · fc8726a2
      Dong Aisheng authored
      On Freescale i.MX7D platform, all clocks operations, including
      enable/disable, rate change and re-parent, requires its parent clock on.
      Current clock core can not support it well.
      This patch adding flag CLK_OPS_PARENT_ENABLE to handle this special case in
      clock core that enable its parent clock firstly for each operation and
      disable it later after operation complete.
      
      The patch part 2 fixes set clock rate and set parent while its parent
      is off. The most special case is for set_parent() operation which requires
      all parents including both old and new one to be enabled at the same time
      during the operation.
      
      Cc: Michael Turquette <mturquette@baylibre.com>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Shawn Guo <shawnguo@kernel.org>
      Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
      [sboyd@codeaurora.org: Move set_rate tracepoint after prepare_enable]
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      fc8726a2
    • Dong Aisheng's avatar
      clk: core: support clocks which requires parents enable (part 1) · a4b3518d
      Dong Aisheng authored
      On Freescale i.MX7D platform, all clocks operations, including
      enable/disable, rate change and re-parent, requires its parent
      clock enable. Current clock core can not support it well.
      This patch introduce a new flag CLK_OPS_PARENT_ENABLE to handle this
      special case in clock core that enable its parent clock firstly for
      each operation and disable it later after operation complete.
      
      The patch part 1 fixes the possible disabling clocks while its parent
      is off during kernel booting phase in clk_disable_unused_subtree().
      
      Before the completion of kernel booting, clock tree is still not built
      completely, there may be a case that the child clock is on but its
      parent is off which could be caused by either HW initial reset state
      or bootloader initialization.
      
      Taking bootloader as an example, we may enable all clocks in HW by default.
      And during kernel booting time, the parent clock could be disabled in its
      driver probe due to calling clk_prepare_enable and clk_disable_unprepare.
      Because it's child clock is only enabled in HW while its SW usecount
      in clock tree is still 0, so clk_disable of parent clock will gate
      the parent clock in both HW and SW usecount ultimately. Then there will
      be a child clock is still on in HW but its parent is already off.
      
      Later in clk_disable_unused(), this clock disable accessing while its
      parent off will cause system hang due to the limitation of HW which
      must require its parent on.
      
      This patch simply enables the parent clock first before disabling
      if flag CLK_OPS_PARENT_ENABLE is set in clk_disable_unused_subtree().
      This is a simple solution and only affects booting time.
      
      After kernel booting up the clock tree is already created, there will
      be no case that child is off but its parent is off.
      So no need do this checking for normal clk_disable() later.
      
      Cc: Michael Turquette <mturquette@baylibre.com>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Shawn Guo <shawnguo@kernel.org>
      Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      a4b3518d
    • Dong Aisheng's avatar
      clk: move clk_disable_unused after clk_core_disable_unprepare function · 7ec986ef
      Dong Aisheng authored
      No function level change, just moving code place.
      clk_disable_unused function will need to call clk_core_prepare_enable/
      clk_core_disable_unprepare when adding CLK_OPS_PARENT_ENABLE features.
      So move it after clk_core_disable_unprepare to avoid adding forward
      declared functions later.
      
      Cc: Michael Turquette <mturquette@baylibre.com>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Shawn Guo <shawnguo@kernel.org>
      Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      7ec986ef
    • Dong Aisheng's avatar
      clk: introduce clk_core_enable_lock and clk_core_disable_lock functions · a6adc30b
      Dong Aisheng authored
      This can be useful when clock core wants to enable/disable clocks.
      Then we don't have to convert the struct clk_core to struct clk to call
      clk_enable/clk_disable which is a bit un-align with exist using.
      
      And after introduce clk_core_{enable|disable}_lock, we can refine
      clk_enable and clk_disable a bit.
      
      As well as clk_core_{enable|disable}_lock, we also added
      clk_core_{prepare|unprepare}_lock and clk_core_prepare_enable/
      clk_core_unprepare_disable for clock core to easily use.
      
      Cc: Michael Turquette <mturquette@baylibre.com>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Shawn Guo <shawnguo@kernel.org>
      Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      a6adc30b
    • Maxime Ripard's avatar
      clk: fixed-factor: Allow for a few clocks to change the parent rate · e6cbf998
      Maxime Ripard authored
      The only way for a fixed factor clock to change its rate would be to change
      its parent rate.
      
      Since passing blindly CLK_SET_RATE_PARENT might break a lot of platforms
      that were relying on the fact that the parent rate wouldn't change,
      introduce a compatible-based whitelist that will allow clocks to opt-in
      that flag.
      Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
      Acked-by: default avatarRob Herring <robh@kernel.org>
      Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      e6cbf998
  8. 30 Jun, 2016 2 commits