1. 23 Sep, 2013 2 commits
    • Dave Martin's avatar
      ARM: bL_switcher/trace: Add trace trigger for trace bootstrapping · b09bbe5b
      Dave Martin authored
      When tracing switching, an external tracer needs a way to bootstrap
      its knowledge of the logical<->physical CPU mapping.
      
      This patch adds a sysfs attribute trace_trigger.  A write to this
      attribute will generate a power:cpu_migrate_current event for each
      online CPU, indicating the current physical CPU for each logical
      CPU.
      
      Activating or deactivating the switcher also generates these
      events, so that the tracer knows about the resulting remapping of
      affected CPUs.
      Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
      b09bbe5b
    • Dave Martin's avatar
      ARM: bL_switcher: Basic trace events support · 1bfbddb6
      Dave Martin authored
      This patch adds simple trace events to the b.L switcher code
      to allow tracing of CPU migration events.
      
      To make use of the trace events, you will need:
      
      CONFIG_FTRACE=y
      CONFIG_ENABLE_DEFAULT_TRACERS=y
      
      The following events are added:
        * power:cpu_migrate_begin
        * power:cpu_migrate_finish
      
      each with the following data:
          u64     timestamp;
          u32     cpu_hwid;
      
      power:cpu_migrate_begin occurs immediately before the
      switcher-specific migration operations start.
      power:cpu_migrate_finish occurs immediately when migration is
      completed.
      
      The cpu_hwid field contains the ID fields of the MPIDR.
      
      * For power:cpu_migrate_begin, cpu_hwid is the ID of the outbound
        physical CPU (equivalent to (from_phys_cpu,from_phys_cluster)).
      
      * For power:cpu_migrate_finish, cpu_hwid is the ID of the inbound
        physical CPU (equivalent to (to_phys_cpu,to_phys_cluster)).
      
      By design, the cpu_hwid field is masked in the same way as the
      device tree cpu node reg property, allowing direct correlation to
      the DT description of the hardware.
      
      The timestamp is added in order to minimise timing noise.  An
      accurate system-wide clock should be used for generating this
      (hopefully getnstimeofday is appropriate, but it could be changed).
      It could be any monotonic shared clock, since the aim is to allow
      accurate deltas to be computed.  We don't necessarily care about
      accurate synchronisation with wall clock time.
      
      In practice, each switch takes place on a single logical CPU,
      and the trace infrastructure should guarantee that events are
      well-ordered with respect to a single logical CPU.
      Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      1bfbddb6