Commit 768235b2 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Greg Kroah-Hartman

x86/platform/intel-mid: Add Intel Penwell to ID table

commit 8e522e1d321b12829960c9b26668c92f14c68d7f upstream.


  ca22312d ("x86/platform/intel-mid: Extend PWRMU to support Penwell")

... enabled the PWRMU driver on platforms based on Intel Penwell, but
unfortunately this is not enough.

Add Intel Penwell ID to pci-mid.c driver as well. To avoid confusion in the
future add a comment to both drivers.
Signed-off-by: default avatarAndy Shevchenko <>
Cc: Linus Torvalds <>
Cc: Peter Zijlstra <>
Cc: Thomas Gleixner <>
Fixes: ca22312d ("x86/platform/intel-mid: Extend PWRMU to support Penwell")
Link: default avatarIngo Molnar <>
Signed-off-by: default avatarGreg Kroah-Hartman <>
parent 70c6cb0f
......@@ -401,6 +401,7 @@ static const struct mid_pwr_device_info mid_info = {
.set_initial_state = mid_set_initial_state,
/* This table should be in sync with the one in drivers/pci/pci-mid.c */
static const struct pci_device_id mid_pwr_pci_ids[] = {
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PENWELL), (kernel_ulong_t)&mid_info },
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_TANGIER), (kernel_ulong_t)&mid_info },
......@@ -60,7 +60,12 @@ static struct pci_platform_pm_ops mid_pci_platform_pm = {
#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
* This table should be in sync with the one in
* arch/x86/platform/intel-mid/pwr.c.
static const struct x86_cpu_id lpss_cpu_ids[] = {
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