Commit 5f775498 authored by Stephen Boyd's avatar Stephen Boyd

clk: qcom: Fully support apq8064 global clock control

Add in the handful of new clocks and introduce a new reset table
with the few new resets.
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 7f9b72ae
This diff is collapsed.
......@@ -308,5 +308,16 @@
#define PLL13 292
#define PLL14 293
#define PLL14_VOTE 294
#define USB_HS3_H_CLK 295
#define USB_HS3_XCVR_SRC 296
#define USB_HS3_XCVR_CLK 297
#define USB_HS4_H_CLK 298
#define USB_HS4_XCVR_SRC 299
#define USB_HS4_XCVR_CLK 300
#define SATA_PHY_CFG_CLK 301
#define SATA_A_CLK 302
#define CE3_SRC 303
#define CE3_CORE_CLK 304
#define CE3_H_CLK 305
#endif
......@@ -114,5 +114,21 @@
#define SFAB_SMPSS_S_RESET 97
#define PRNG_RESET 98
#define RIVA_RESET 99
#define USB_HS3_RESET 100
#define USB_HS4_RESET 101
#define CE3_RESET 102
#define PCIE_EXT_PCI_RESET 103
#define PCIE_PHY_RESET 104
#define PCIE_PCI_RESET 105
#define PCIE_POR_RESET 106
#define PCIE_HCLK_RESET 107
#define PCIE_ACLK_RESET 108
#define CE3_H_RESET 109
#define SFAB_CE3_M_RESET 110
#define SFAB_CE3_S_RESET 111
#define SATA_RESET 112
#define CE3_SLEEP_RESET 113
#define GSS_SLP_RESET 114
#define GSS_RESET 115
#endif
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