Commit 54b48b8f authored by Vikram Narayanan's avatar Vikram Narayanan

test_mods/nullnet: Prealloc 10 channel pairs

parent 23b75d5f
......@@ -19,7 +19,7 @@
/* UTCB ---------------------------------------- */
#define LCD_NUM_REGS 16
#define LCD_NUM_REGS 25
struct lcd_utcb {
/**
* mr registers are general purpose 64-bit registers. You can
......@@ -63,6 +63,17 @@ static inline void lcd_set_cr##idx(cptr_t val) \
{ \
lcd_get_utcb()->cr[idx] = val; \
}
static inline void lcd_set_cr(int idx, cptr_t val)
{
lcd_get_utcb()->cr[idx] = val;
}
static inline cptr_t lcd_get_cr(int idx)
{
return lcd_get_utcb()->cr[idx];
}
LCD_MK_REG_ACCESS(0)
LCD_MK_REG_ACCESS(1)
LCD_MK_REG_ACCESS(2)
......@@ -80,6 +91,15 @@ LCD_MK_REG_ACCESS(12)
LCD_MK_REG_ACCESS(13)
LCD_MK_REG_ACCESS(14)
LCD_MK_REG_ACCESS(15)
LCD_MK_REG_ACCESS(16)
LCD_MK_REG_ACCESS(17)
LCD_MK_REG_ACCESS(18)
LCD_MK_REG_ACCESS(19)
LCD_MK_REG_ACCESS(20)
LCD_MK_REG_ACCESS(21)
LCD_MK_REG_ACCESS(22)
LCD_MK_REG_ACCESS(23)
LCD_MK_REG_ACCESS(24)
/* SYNCHRONOUS IPC ---------------------------------------- */
......
......@@ -514,40 +514,28 @@ int create_one_async_channel(struct thc_channel **chnl, cptr_t *tx, cptr_t *rx)
#ifdef CONFIG_PREALLOC_XMIT_CHANNELS
int prep_xmit_channels_lcd(void)
{
cptr_t tx[MAX_CHNL_PAIRS], rx[MAX_CHNL_PAIRS];
struct thc_channel *xmit;
int i;
for (i = 0; i < MAX_CHNL_PAIRS; i++) {
if (create_one_async_channel(&xmit, &tx[i], &rx[i]))
LIBLCD_ERR("async channel creation failed\n");
}
lcd_set_cr5(rx[0]);
lcd_set_cr6(tx[0]);
lcd_set_cr7(rx[1]);
lcd_set_cr8(tx[1]);
lcd_set_cr9(rx[2]);
lcd_set_cr10(tx[2]);
lcd_set_cr11(rx[3]);
lcd_set_cr12(tx[3]);
lcd_set_cr13(rx[4]);
lcd_set_cr14(tx[4]);
return 0;
cptr_t tx[MAX_CHNL_PAIRS], rx[MAX_CHNL_PAIRS];
struct thc_channel *xmit;
int i, j;
for (i = 0; i < MAX_CHNL_PAIRS; i++) {
if (create_one_async_channel(&xmit, &tx[i], &rx[i]))
LIBLCD_ERR("async channel creation failed\n");
}
for (i = 0, j = 5; i < MAX_CHNL_PAIRS && j < LCD_NUM_REGS; i++) {
lcd_set_cr(j++, rx[i]);
lcd_set_cr(j++, tx[i]);
}
return 0;
}
void prep_xmit_channels_clean_lcd(void)
{
lcd_set_cr5(CAP_CPTR_NULL);
lcd_set_cr6(CAP_CPTR_NULL);
lcd_set_cr7(CAP_CPTR_NULL);
lcd_set_cr8(CAP_CPTR_NULL);
lcd_set_cr9(CAP_CPTR_NULL);
lcd_set_cr10(CAP_CPTR_NULL);
lcd_set_cr11(CAP_CPTR_NULL);
lcd_set_cr12(CAP_CPTR_NULL);
lcd_set_cr13(CAP_CPTR_NULL);
lcd_set_cr14(CAP_CPTR_NULL);
int i;
for (i = 0; i < LCD_NUM_REGS; i++)
lcd_set_cr(i, CAP_CPTR_NULL);
}
#endif
......
......@@ -83,7 +83,8 @@ struct skbuff_members {
#define SENDER_DISPATCH_LOOP
#define CONFIG_PREALLOC_XMIT_CHANNELS
#define MAX_CHNL_PAIRS 5
#define MAX_CHANNELS_PER_LCD 10
#define MAX_CHNL_PAIRS MAX_CHANNELS_PER_LCD
//#define NO_AWE
//#define NO_HASHING
......
......@@ -126,8 +126,6 @@ uint64_t *perf4 = NULL;
#endif
struct kmem_cache *skb_c_cache = NULL;
#define MAX_CHANNELS_PER_LCD 10
struct lcd_smp {
cptr_t sync_ep;
struct thc_channel *xmit_channels[MAX_CHANNELS_PER_LCD];
......@@ -2164,17 +2162,15 @@ out:
#ifdef CONFIG_PREALLOC_XMIT_CHANNELS
int prep_xmit_channels_klcd(int lcd_id)
{
int i;
int i, j;
struct thc_channel *chnl;
cptr_t tx[MAX_CHNL_PAIRS], rx[MAX_CHNL_PAIRS];
int ret;
tx[0] = lcd_cr5(); rx[0] = lcd_cr6();
tx[1] = lcd_cr7(); rx[1] = lcd_cr8();
tx[2] = lcd_cr9(); rx[2] = lcd_cr10();
tx[3] = lcd_cr11(); rx[3] = lcd_cr12();
tx[4] = lcd_cr13(); rx[4] = lcd_cr14();
for (i = 0, j = 5; i < MAX_CHNL_PAIRS && j < LCD_NUM_REGS; i++) {
tx[i] = lcd_get_cr(j++);
rx[i] = lcd_get_cr(j++);
}
/*
* Set up async ring channel
*/
......@@ -2189,21 +2185,14 @@ int prep_xmit_channels_klcd(int lcd_id)
}
fail_ep:
return -1;
return -1;
}
void prep_xmit_channels_clean_klcd(void)
{
lcd_set_cr5(CAP_CPTR_NULL);
lcd_set_cr6(CAP_CPTR_NULL);
lcd_set_cr7(CAP_CPTR_NULL);
lcd_set_cr8(CAP_CPTR_NULL);
lcd_set_cr9(CAP_CPTR_NULL);
lcd_set_cr10(CAP_CPTR_NULL);
lcd_set_cr11(CAP_CPTR_NULL);
lcd_set_cr12(CAP_CPTR_NULL);
lcd_set_cr13(CAP_CPTR_NULL);
lcd_set_cr14(CAP_CPTR_NULL);
int i;
for (i = 0; i < LCD_NUM_REGS; i++)
lcd_set_cr(i, CAP_CPTR_NULL);
}
#endif
......
......@@ -124,7 +124,7 @@ static int do_one_register(cptr_t register_chnl)
int ret;
cptr_t sync_endpoint, tx, rx;
cptr_t tx_xmit, rx_xmit;
int i;
int i, j;
cptr_t _tx[MAX_CHNL_PAIRS], _rx[MAX_CHNL_PAIRS];
/*
* Set up cptrs
......@@ -174,16 +174,11 @@ static int do_one_register(cptr_t register_chnl)
lcd_set_cr2(rx);
lcd_set_cr3(tx_xmit);
lcd_set_cr4(rx_xmit);
lcd_set_cr5(_rx[0]);
lcd_set_cr6(_tx[0]);
lcd_set_cr7(_rx[1]);
lcd_set_cr8(_tx[1]);
lcd_set_cr9(_rx[2]);
lcd_set_cr10(_tx[2]);
lcd_set_cr11(_rx[3]);
lcd_set_cr12(_tx[3]);
lcd_set_cr13(_rx[4]);
lcd_set_cr14(_tx[4]);
for (i = 0, j = 5; i < MAX_CHNL_PAIRS && j < LCD_NUM_REGS; i++) {
lcd_set_cr(j++, _tx[i]);
lcd_set_cr(j++, _rx[i]);
}
ret = lcd_sync_poll_recv(register_chnl);
if (ret) {
......@@ -210,21 +205,9 @@ static int do_one_register(cptr_t register_chnl)
return 0;
free_cptrs:
lcd_set_cr0(CAP_CPTR_NULL);
lcd_set_cr1(CAP_CPTR_NULL);
lcd_set_cr2(CAP_CPTR_NULL);
lcd_set_cr3(CAP_CPTR_NULL);
lcd_set_cr4(CAP_CPTR_NULL);
lcd_set_cr5(CAP_CPTR_NULL);
lcd_set_cr6(CAP_CPTR_NULL);
lcd_set_cr7(CAP_CPTR_NULL);
lcd_set_cr8(CAP_CPTR_NULL);
lcd_set_cr9(CAP_CPTR_NULL);
lcd_set_cr10(CAP_CPTR_NULL);
lcd_set_cr11(CAP_CPTR_NULL);
lcd_set_cr12(CAP_CPTR_NULL);
lcd_set_cr13(CAP_CPTR_NULL);
lcd_set_cr14(CAP_CPTR_NULL);
for (i = 0; i < LCD_NUM_REGS; i++)
lcd_set_cr(i, CAP_CPTR_NULL);
lcd_cptr_free(sync_endpoint);
fail3:
......
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