Commit 0bd8fa26 authored by Maxime Ripard's avatar Maxime Ripard Committed by Michael Turquette

clk: sunxi-ng: h3: Fix audio clock divider offset

The code had a typo and got the wrong offset for the hardcoded divider, fix
that.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Reported-by: default avatarJean-Francois Moine <moinejf@free.fr>
Reported-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160711203448.18062-1-maxime.ripard@free-electrons.com
parent 0577e485
......@@ -817,8 +817,8 @@ static void __init sun8i_h3_ccu_setup(struct device_node *node)
/* Force the PLL-Audio-1x divider to 4 */
val = readl(reg + SUN8I_H3_PLL_AUDIO_REG);
val &= ~GENMASK(4, 0);
writel(val | 3, reg + SUN8I_H3_PLL_AUDIO_REG);
val &= ~GENMASK(19, 16);
writel(val | (3 << 16), reg + SUN8I_H3_PLL_AUDIO_REG);
sunxi_ccu_probe(node, reg, &sun8i_h3_ccu_desc);
}
......
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