• Dong Aisheng's avatar
    clk: core: support clocks which requires parents enable (part 2) · fc8726a2
    Dong Aisheng authored
    On Freescale i.MX7D platform, all clocks operations, including
    enable/disable, rate change and re-parent, requires its parent clock on.
    Current clock core can not support it well.
    This patch adding flag CLK_OPS_PARENT_ENABLE to handle this special case in
    clock core that enable its parent clock firstly for each operation and
    disable it later after operation complete.
    
    The patch part 2 fixes set clock rate and set parent while its parent
    is off. The most special case is for set_parent() operation which requires
    all parents including both old and new one to be enabled at the same time
    during the operation.
    
    Cc: Michael Turquette <mturquette@baylibre.com>
    Cc: Stephen Boyd <sboyd@codeaurora.org>
    Cc: Shawn Guo <shawnguo@kernel.org>
    Signed-off-by: 's avatarDong Aisheng <aisheng.dong@nxp.com>
    [sboyd@codeaurora.org: Move set_rate tracepoint after prepare_enable]
    Signed-off-by: 's avatarStephen Boyd <sboyd@codeaurora.org>
    fc8726a2